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| author | Mark Pizzutillo <Mark.Pizzutillo@ibm.com> | 2019-08-12 11:47:52 -0400 |
|---|---|---|
| committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2019-08-20 22:26:43 -0500 |
| commit | d43de0d6439db7c726ecafbab1ba175b135b5a4a (patch) | |
| tree | 855f5064b2105adf4aaef019ab1161d3bb301474 /src/import | |
| parent | 1fb1c42e405aeb6bf0df3e0960f918e097e15373 (diff) | |
| download | talos-hostboot-d43de0d6439db7c726ecafbab1ba175b135b5a4a.tar.gz talos-hostboot-d43de0d6439db7c726ecafbab1ba175b135b5a4a.zip | |
Add pmic_status_tool
Change-Id: Id2203423b5cde2f0babfb30adfb5875ebf8ab2be
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82194
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82206
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
3 files changed, 42 insertions, 3 deletions
diff --git a/src/import/chips/ocmb/common/include/pmic_regs_fld.H b/src/import/chips/ocmb/common/include/pmic_regs_fld.H index 67b36b305..1301d0e05 100644 --- a/src/import/chips/ocmb/common/include/pmic_regs_fld.H +++ b/src/import/chips/ocmb/common/include/pmic_regs_fld.H @@ -69,7 +69,47 @@ struct pmicFields<mss::pmic::product::JEDEC_COMPLIANT> static constexpr uint8_t SEQUENCE_SWC_ENABLE = 0x04; static constexpr uint8_t SEQUENCE_SWD_ENABLE = 0x03; - static constexpr uint8_t VIN_BULK_INPUT_PWR_GOOD_STATUS = 0x07; + // R08 + static constexpr uint8_t R08_VIN_BULK_INPUT_PWR_GOOD_STATUS = 0x07; + static constexpr uint8_t R08_CRITICAL_TEMP_SHUTDOWN_STATUS = 0x06; + static constexpr uint8_t R08_SWA_PWR_GOOD_STATUS = 0x05; + static constexpr uint8_t R08_SWB_PWR_GOOD_STATUS = 0x04; + static constexpr uint8_t R08_SWC_PWR_GOOD_STATUS = 0x03; + static constexpr uint8_t R08_SWD_PWR_GOOD_STATUS = 0x02; + static constexpr uint8_t R08_VIN_MGMT_INPUT_OVER_VOLTAGE = 0x01; + static constexpr uint8_t R08_VIN_BULK_INPUT_OVER_VOLTAGE = 0x00; + + // R09 + static constexpr uint8_t R09_PMIC_HIGH_TEMP_WARNING_STATUS = 0x07; + static constexpr uint8_t R09_VBIAS_PWR_GOOD_STATUS = 0x06; + static constexpr uint8_t R09_VOUT_1_8_V_PWR_GOOD_STATUS = 0x05; + static constexpr uint8_t R09_VIN_MGMT_TO_VIN_BULK_SWITCHOVER_STATUS = 0x04; + static constexpr uint8_t R09_SWA_HIGH_OUTPUT_CURRENT_CONSUMPTION_WARNING_STATUS = 0x03; + static constexpr uint8_t R09_SWB_HIGH_OUTPUT_CURRENT_CONSUMPTION_WARNING_STATUS = 0x02; + static constexpr uint8_t R09_SWC_HIGH_OUTPUT_CURRENT_CONSUMPTION_WARNING_STATUS = 0x01; + static constexpr uint8_t R09_SWD_HIGH_OUTPUT_CURRENT_CONSUMPTION_WARNING_STATUS = 0x00; + + // R0A + static constexpr uint8_t R0A_SWA_OUTPUT_OVER_VOLTAGE_STATUS = 0x07; + static constexpr uint8_t R0A_SWB_OUTPUT_OVER_VOLTAGE_STATUS = 0x06; + static constexpr uint8_t R0A_SWC_OUTPUT_OVER_VOLTAGE_STATUS = 0x05; + static constexpr uint8_t R0A_SWD_OUTPUT_OVER_VOLTAGE_STATUS = 0x04; + static constexpr uint8_t R0A_PEC_ERROR_STATUS = 0x03; + static constexpr uint8_t R0A_PARITY_ERROR_STATUS = 0x02; + static constexpr uint8_t R0A_IBI_STATUS = 0x01; // 0x00 reserved + + // R0B + static constexpr uint8_t R0B_SWA_OUTPUT_CURRENT_LIMITER_WARNING_STATUS = 0x07; + static constexpr uint8_t R0B_SWB_OUTPUT_CURRENT_LIMITER_WARNING_STATUS = 0x06; + static constexpr uint8_t R0B_SWC_OUTPUT_CURRENT_LIMITER_WARNING_STATUS = 0x05; + static constexpr uint8_t R0B_SWD_OUTPUT_CURRENT_LIMITER_WARNING_STATUS = 0x04; + static constexpr uint8_t R0B_SWA_OUTPUT_UNDER_VOLTAGE_LOCKOUT_STATUS = 0x03; + static constexpr uint8_t R0B_SWB_OUTPUT_UNDER_VOLTAGE_LOCKOUT_STATUS = 0x02; + static constexpr uint8_t R0B_SWC_OUTPUT_UNDER_VOLTAGE_LOCKOUT_STATUS = 0x01; + static constexpr uint8_t R0B_SWD_OUTPUT_UNDER_VOLTAGE_LOCKOUT_STATUS = 0x00; + + // 0x14 + static constexpr uint8_t R14_GLOBAL_CLEAR_STATUS = 0x00; static constexpr uint8_t DELAY_FLD_LENGTH = 3; static constexpr uint8_t VOLTAGE_SETTING_START = 0; diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.C b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.C index 27328334d..3906c55ef 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.C +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_common_utils.C @@ -71,7 +71,7 @@ fapi2::ReturnCode poll_for_pbulk_good( FAPI_TRY(mss::pmic::i2c::reg_read_reverse_buffer(i_pmic_target, REGS::R08, l_pbulk_status_buffer), "pmic_enable: Could not read 0x%02hhX on %s ", REGS::R08, mss::c_str(i_pmic_target)); - return l_pbulk_status_buffer.getBit<FIELDS::VIN_BULK_INPUT_PWR_GOOD_STATUS>() == + return l_pbulk_status_buffer.getBit<FIELDS::R08_VIN_BULK_INPUT_PWR_GOOD_STATUS>() == mss::pmic::consts<mss::pmic::product::JEDEC_COMPLIANT>::PWR_GOOD; fapi_try_exit: diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H index c74762c38..5de810f55 100644 --- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H +++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H @@ -624,7 +624,6 @@ inline fapi2::ReturnCode bias_with_spd_voltages<mss::pmic::vendor::TI>( FAPI_TRY(mss::pmic::i2c::reg_write(i_pmic_target, mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], l_volt_buffer), "Error writing address 0x%02hhX of PMIC %s", mss::pmic::VOLT_SETTING_ACTIVE_REGS[l_rail_index], mss::c_str(i_pmic_target)); - } return fapi2::FAPI2_RC_SUCCESS; |
