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authorStephen Glancy <sglancy@us.ibm.com>2019-08-12 11:23:29 -0400
committerDaniel M Crowell <dcrowell@us.ibm.com>2019-08-21 09:14:29 -0500
commit2a3012ab747a00bf937a451ba8f277d2c8a80ce3 (patch)
tree231b907a5be4ec9ce0f47093870b102cca9dc980 /src/import
parent12fdf649953a456a2306d2a796863f9b0c4aebba (diff)
downloadtalos-hostboot-2a3012ab747a00bf937a451ba8f277d2c8a80ce3.tar.gz
talos-hostboot-2a3012ab747a00bf937a451ba8f277d2c8a80ce3.zip
Updates exp access delay regs to set delays
Change-Id: I2d78d348aa64f40410b697aae9bdd44ebc8faf1b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82086 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82238 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H1
-rw-r--r--src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H1
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H1
3 files changed, 3 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H
index e82bd9dec..1bbd7bab9 100644
--- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H
+++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fixes.H
@@ -3148,5 +3148,6 @@ static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R7 = 0x04065dacull;
static const uint64_t EXP_DDR4_PHY_DBYTE9_RXPBDLYTG3_R8 = 0x040661acull;
static const uint64_t EXPLR_RDF_MCBCM2 = 0x08011c35ull;
static const uint64_t EXPLR_TP_MB_UNIT_TOP_TR1_TRACE_TRCTRL_CONFIG = 0x08010442ull;
+static const uint64_t EXP_APBONLY0_MICROCONTMUXSEL = 0x04340000ull;
#endif
diff --git a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H
index bcdee837c..98102826c 100644
--- a/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H
+++ b/src/import/chips/ocmb/explorer/common/include/explorer_scom_addresses_fld_fixes.H
@@ -49,5 +49,6 @@ static const uint8_t EXPLR_MCBIST_MBSSYMEC9Q_MODAL_SYMBOL_COUNTER_79_LEN =
static const uint8_t EXPLR_RDF_MCBCM2_MCBIST_HALF_COMPARE_MASK = 0 ;
static const uint8_t EXPLR_RDF_MCBCM2_MCBIST_HALF_COMPARE_MASK_LEN = 40 ;
static const uint8_t EXPLR_TP_MB_UNIT_TOP_TR1_TRACE_TRCTRL_CONFIG_TRA_MASTER_CLOCK_ENABLE = 22;
+static const uint8_t EXP_APBONLY0_MICROCONTMUXSEL_MICROCONTMUXSEL = 63 ;
#endif
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H
index b37a5008e..cc267410d 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H
@@ -214,6 +214,7 @@ enum cmd_id : uint8_t
FW_PQM_HORIZONTAL_BATHTUB_GET = 0x18,
FW_PQM_VERTICAL_BATHTUB_GET = 0x19,
FW_PQM_2D_BATHTUB_GET = 0x1A,
+ EXP_FW_PQM_FORCE_DELAY_LINE_UPDATE = 0x1B,
};
///
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