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| author | Jenny Huynh <jhuynh@us.ibm.com> | 2017-08-29 12:21:02 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-08 18:18:41 -0400 |
| commit | fd99c868ea90d82e033a857e350c46b5bc4ae8a1 (patch) | |
| tree | 848df0b4f127ef622cd04c08988058bbfd093a21 /src/import | |
| parent | 8a207b1cfe67d065e6a1cd2c6dcf0dcdf642fc40 (diff) | |
| download | talos-hostboot-fd99c868ea90d82e033a857e350c46b5bc4ae8a1.tar.gz talos-hostboot-fd99c868ea90d82e033a857e350c46b5bc4ae8a1.zip | |
Enabling PWC for Nimbus DD2.0+ and Cumulus DD1.0+
Dial getting overwritten by a global dial; moving both to scan inits
Change-Id: Ia16a78c146b88f21325a4b1e619a5bf4df5328d7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45306
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Emmanuel Sacristan <esacris@us.ibm.com>
Dev-Ready: Emmanuel Sacristan <esacris@us.ibm.com>
Reviewed-by: JAKE C. TRUELOVE <jtruelove@us.ibm.com>
Dev-Ready: JAKE C. TRUELOVE <jtruelove@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45312
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C index 944f4916f..72a7fd3ae 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_mmu_scom.C @@ -194,12 +194,6 @@ fapi2::ReturnCode p9_mmu_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& l_scom_buffer.insert<52, 1, 63, uint64_t>(l_NMMU_MM_CFG_NMMU_CTL_TW_RDX_PWC_DIS_ON ); } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) - { - constexpr auto l_NMMU_MM_CFG_NMMU_DD2_ISS734_FIX_MODE_OPT3_ENA_IGNORE_PWC_PTE_HIT = 0x3ffe; - l_scom_buffer.insert<52, 1, 50, uint64_t>(l_NMMU_MM_CFG_NMMU_DD2_ISS734_FIX_MODE_OPT3_ENA_IGNORE_PWC_PTE_HIT ); - } - if (((l_chip_id == 0x5) && (l_chip_ec == 0x20)) || ((l_chip_id == 0x5) && (l_chip_ec == 0x21)) || ((l_chip_id == 0x6) && (l_chip_ec == 0x10)) ) { |
