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authorDan Crowell <dcrowell@us.ibm.com>2019-04-09 09:57:56 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-04-10 12:13:45 -0500
commiteee59e94a080377d8db0317647fe9588aef974f0 (patch)
treead8d39077b73b0f6beda3f436493057c54794d9f /src/import
parent66b1aa028bfaa169edd977e68942b88f457c5ca4 (diff)
downloadtalos-hostboot-eee59e94a080377d8db0317647fe9588aef974f0.tar.gz
talos-hostboot-eee59e94a080377d8db0317647fe9588aef974f0.zip
Remove to remirror some files
chips/p9/procedures/hwp/memory/lib/workarounds/mca_workarounds.C chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C Change-Id: I93f44ffe5e8219124be6a159485c639e3abb324c Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75746 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mca_workarounds.C200
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C223
2 files changed, 0 insertions, 423 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mca_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mca_workarounds.C
deleted file mode 100644
index a2d219148..000000000
--- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mca_workarounds.C
+++ /dev/null
@@ -1,200 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mca_workarounds.C $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2017,2019 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-///
-/// @file workarounds/mca_workarounds.C
-/// @brief Workarounds for the MCA logic blocks
-/// Workarounds are very device specific, so there is no attempt to generalize
-/// this code in any way.
-///
-// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
-// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
-// *HWP Team: Memory
-// *HWP Level: 3
-// *HWP Consumed by: FSP:HB
-
-#include <fapi2.H>
-#include <lib/shared/mss_const.H>
-#include <p9_mc_scom_addresses.H>
-#include <p9_mc_scom_addresses_fld.H>
-#include <lib/mss_attribute_accessors.H>
-#include <lib/workarounds/mca_workarounds.H>
-#include <generic/memory/lib/utils/scom.H>
-
-namespace mss
-{
-
-namespace workarounds
-{
-
-///
-/// @brief Checks whether the workaround needs to be run for non-TSV parts
-/// @param[in] const ref to the target
-/// @param[in] i_power_control - MRW power control - passed in to make it easier to test
-/// @param[in] i_idle_power_control - MRW idle power control value - passed in to make it easier to test
-/// @return bool true iff we're on a Nimbus >= EC 2.0, non-TSV, and self-time-refresh
-///
-bool check_str_non_tsv_parity_workaround(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
- const uint64_t i_power_control,
- const uint64_t i_idle_power_control)
-{
- const auto l_less_than_dd2 = chip_ec_nimbus_lt_2_0(i_target);
- uint8_t l_hybrid[MAX_DIMM_PER_PORT] = {};
- uint8_t l_stack_type[MAX_DIMM_PER_PORT] = {};
- bool l_tsv = false;
- bool l_str_enabled = false;
- bool l_is_nvdimm = false;
-
- // Figure out if any hybrid memory is plugged
- FAPI_TRY(mss::eff_hybrid(i_target, l_hybrid));
-
- // If hybrid memory is plugged, what kind?
- // Checking the first dimm here is enough as the plug rules
- // only allow single drop for NVDIMM
- if (l_hybrid[0] == fapi2::ENUM_ATTR_EFF_HYBRID_IS_HYBRID)
- {
- uint8_t l_hybrid_mem_type[MAX_DIMM_PER_PORT] = {};
- FAPI_TRY(mss::eff_hybrid_memory_type(i_target, l_hybrid_mem_type));
- l_is_nvdimm = (l_hybrid_mem_type[0] == fapi2::ENUM_ATTR_EFF_HYBRID_MEMORY_TYPE_NVDIMM);
- }
-
- // If either STR is enabled, STR is enabled for the whole system
- // Per the power thermal team, we only need to check PD_AND_STR and PD_AND_STR_CLK_STOP
- // If nvdimm is plugged, STR is also needed
- l_str_enabled = (i_power_control == fapi2::ENUM_ATTR_MSS_MRW_POWER_CONTROL_REQUESTED_PD_AND_STR ||
- i_power_control == fapi2::ENUM_ATTR_MSS_MRW_POWER_CONTROL_REQUESTED_PD_AND_STR_CLK_STOP) ||
- (i_idle_power_control == fapi2::ENUM_ATTR_MSS_MRW_IDLE_POWER_CONTROL_REQUESTED_PD_AND_STR ||
- i_idle_power_control == fapi2::ENUM_ATTR_MSS_MRW_IDLE_POWER_CONTROL_REQUESTED_PD_AND_STR_CLK_STOP) ||
- l_is_nvdimm;
-
- // Now checks whether the DIMM's are TSV
- // Note: eff_config plug rules will require that the whole MCA either have TSV or non-TSV DIMMs
- // As such, it is fine to just check DIMM0 for if it is a TSV DIMM or not
- FAPI_TRY(mss::eff_prim_stack_type(i_target, l_stack_type));
-
- // If DIMM0 is a TSV, set to true (DIMM0 has to exist and needs to equal DIMM0 if it's 3DS)
- l_tsv = (l_stack_type[0] == fapi2::ENUM_ATTR_EFF_PRIM_STACK_TYPE_3DS);
-
- // The workaround is needed iff
- // 1) greater than or equal to DD2
- // 2) self time refresh is enabled
- // 3) the DIMM's are not TSV
- FAPI_INF("%s %s DD2 STR: %s DIMM %s TSV", mss::c_str(i_target),
- l_less_than_dd2 ? "less than" : "greater than or equal to",
- l_str_enabled ? "enabled" : "disabled",
- l_tsv ? "is" : "isn't");
- return (!l_less_than_dd2) && l_str_enabled && (!l_tsv);
-
-fapi_try_exit:
- FAPI_ERR("failed calling check_str_non_tsv_parity_workaround: 0x%lx (target: %s)",
- uint64_t(fapi2::current_err), mss::c_str(i_target));
- fapi2::Assert(false);
- return false;
-}
-
-///
-/// @brief Blindly disables the CID parity
-/// @param[in] i_target The MCA target on which to run
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-/// @note Used for code beautification and unit testing
-///
-fapi2::ReturnCode disable_cid_parity(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target)
-{
- // constexpr's to make the code a little prettier
- constexpr uint64_t MBA_FARB1Q = MCA_MBA_FARB1Q;
- constexpr uint64_t CID_PARITY_DISABLE = MCA_MBA_FARB1Q_CFG_DDR4_PARITY_ON_CID_DIS;
-
- // Disables the parity
- fapi2::buffer<uint64_t> l_data;
-
- // TODO:RTC179509 - update getScom/putScom when we have register API for FARB1Q
- // Read...
- FAPI_TRY(mss::getScom(i_target, MBA_FARB1Q, l_data));
-
- // TODO:RTC179510 - update the set bit when we have register API for FARB1Q's parity disable bit
- // Modify...
- l_data.setBit<CID_PARITY_DISABLE>();
-
- // Write
- FAPI_TRY(mss::putScom(i_target, MBA_FARB1Q, l_data));
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
-/// @brief Disables CID parity on non-TSV, DD2 parts that run self-time refresh
-/// @param[in] i_target The MCA target on which to run
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-///
-fapi2::ReturnCode str_non_tsv_parity(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target)
-{
- bool l_workaround = false;
-
- // STR can be enabled via two attributes - ATTR_MSS_MRW_POWER_CONTROL_REQUESTED or ATTR_MSS_MRW_IDLE_POWER_CONTROL_REQUESTED
- uint8_t l_power_control = 0;
- uint8_t l_idle_power_control = 0;
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_MRW_POWER_CONTROL_REQUESTED, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
- l_power_control) );
- FAPI_TRY( mss::mrw_idle_power_control_requested(l_idle_power_control) );
-
- // If the workaround is not needed, skip it
- l_workaround = check_str_non_tsv_parity_workaround(i_target, l_power_control, l_idle_power_control);
-
- if(!l_workaround)
- {
- FAPI_INF("%s self-time refresh parity workaround is not needed and is being skipped", mss::c_str(i_target));
- return fapi2::FAPI2_RC_SUCCESS;
- }
-
- // Disables the parity
- FAPI_TRY(disable_cid_parity(i_target));
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
-/// @brief Disable bypass on port with symbol mark placed
-/// @param[in] i_target the fapi2 target of the port
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if ok
-/// @note The workaround for HW474117 applies to all EC versions, so no switch is necessary
-///
-fapi2::ReturnCode disable_bypass( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
-{
- fapi2::buffer<uint64_t> l_mca_dbgr_buffer;
-
- // Trigger WAT logic to 'disable bypass' for the given port: set DBGR[8]
- FAPI_TRY( mss::getScom(i_target, MCA_DBGR, l_mca_dbgr_buffer) );
- l_mca_dbgr_buffer.setBit<MCA_DBGR_ECC_WAT_ENABLE>();
- FAPI_TRY( mss::putScom(i_target, MCA_DBGR, l_mca_dbgr_buffer) );
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-} // ns workarounds
-
-} // ns mss
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C
deleted file mode 100644
index 99fb48cee..000000000
--- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C
+++ /dev/null
@@ -1,223 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/workarounds/nvdimm_workarounds.C $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-///
-/// @file nvdimm_workarounds.C
-/// @brief Workarounds for NVDIMM
-/// Workarounds are very device specific, so there is no attempt to generalize
-/// this code in any way.
-///
-// *HWP HWP Owner: Tsung Yeung <tyeung@us.ibm.com>
-// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com>
-// *HWP Team: Memory
-// *HWP Level: 3
-// *HWP Consumed by: FSP:SBE
-
-#include <fapi2.H>
-#include <vector>
-#include <p9_mc_scom_addresses.H>
-#include <p9_mc_scom_addresses_fld.H>
-
-namespace mss
-{
-
-namespace workarounds
-{
-
-namespace nvdimm
-{
-
-// MBASTR0Q for each MCA
-// Note: Since the scoms are executed at the chip, it needs the dedicated
-// address for each MCA
-const uint64_t MBASTR0Q_REG[] =
-{
- MCA_0_MBASTR0Q,
- MCA_1_MBASTR0Q,
- MCA_2_MBASTR0Q,
- MCA_3_MBASTR0Q,
- MCA_4_MBASTR0Q,
- MCA_5_MBASTR0Q,
- MCA_6_MBASTR0Q,
- MCA_7_MBASTR0Q,
-};
-
-// MBARPC0Q for each MCA
-const uint64_t MBARPC0Q_REG[] =
-{
- MCA_0_MBARPC0Q,
- MCA_1_MBARPC0Q,
- MCA_2_MBARPC0Q,
- MCA_3_MBARPC0Q,
- MCA_4_MBARPC0Q,
- MCA_5_MBARPC0Q,
- MCA_6_MBARPC0Q,
- MCA_7_MBARPC0Q,
-};
-
-// FARB5Q for each MCA
-const uint64_t FARB5Q_REG[] =
-{
- MCA_0_MBA_FARB5Q,
- MCA_1_MBA_FARB5Q,
- MCA_2_MBA_FARB5Q,
- MCA_3_MBA_FARB5Q,
- MCA_4_MBA_FARB5Q,
- MCA_5_MBA_FARB5Q,
- MCA_6_MBA_FARB5Q,
- MCA_7_MBA_FARB5Q,
-};
-
-// MCB_CNTLQ
-constexpr const uint64_t MCB_CNTLQ_REG[] =
-{
- MCBIST_0_MCB_CNTLQ,
- MCBIST_1_MCB_CNTLQ,
-};
-
-constexpr uint8_t PORTS_PER_MODULE = 8;
-
-///
-/// @brief Helper for trigger_csave. This subroutine puts the MCA into STR
-/// This is the same thing as mss::nvdimm::self_refresh_entry() but rewritten
-/// to support SBE
-/// @param[in] i_target - PROC_CHIP target
-/// @param[in] l_mca_pos - The MCA position relative to the PROC
-/// @return FAPI2_RC_SUCCESS iff setup was successful
-///
-fapi2::ReturnCode self_refresh_entry( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
- const uint8_t l_mca_pos)
-{
- FAPI_ASSERT((l_mca_pos < PORTS_PER_MODULE),
- fapi2::MSS_SRE_MCA_OUT_OF_RANGE().
- set_PROC_TARGET(i_target).
- set_MCA_POS(l_mca_pos),
- "Invalid port number %u provided", l_mca_pos);
-
- FAPI_DBG("Entering STR on port %u.", l_mca_pos);
-
- {
- fapi2::buffer<uint64_t> l_mbarpc0_data, l_mbastr0_data, l_mcbcntlq_data;
- constexpr uint64_t ENABLE = 1;
- constexpr uint64_t DISABLE = 0;
- constexpr uint64_t MAXALL_MIN0 = 0b010;
- constexpr uint64_t STOP = 1;
- constexpr uint64_t PORTS_PER_MCBIST = 4;
- constexpr uint64_t TIME_0 = 0;
- const uint8_t l_mcbist = l_mca_pos < PORTS_PER_MCBIST ? 0 : 1;
-
- // Stop mcbist first otherwise it can kick the DIMM out of STR
- FAPI_TRY(fapi2::getScom(i_target, MCB_CNTLQ_REG[l_mcbist], l_mcbcntlq_data));
- l_mcbcntlq_data.writeBit<MCBIST_CCS_CNTLQ_STOP>(STOP);
- FAPI_TRY(fapi2::putScom(i_target, MCB_CNTLQ_REG[l_mcbist], l_mcbcntlq_data));
-
- // Step 1 - In MBARPC0Q, disable power domain control, set domain to MAXALL_MIN0,
- // and disable minimum domain reduction (allow immediate entry of STR)
- FAPI_TRY(fapi2::getScom(i_target, MBARPC0Q_REG[l_mca_pos], l_mbarpc0_data));
- l_mbarpc0_data.writeBit<MCA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_ENABLE>(DISABLE);
- l_mbarpc0_data.insertFromRight<MCA_MBARPC0Q_CFG_MIN_MAX_DOMAINS, MCA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_LEN>(MAXALL_MIN0);
- l_mbarpc0_data.writeBit<MCA_MBARPC0Q_CFG_MIN_DOMAIN_REDUCTION_ENABLE>(DISABLE);
- FAPI_TRY(fapi2::putScom(i_target, MBARPC0Q_REG[l_mca_pos], l_mbarpc0_data));
-
- // Step 2 - In MBASTR0Q, enable STR entry
- FAPI_TRY(fapi2::getScom(i_target, MBASTR0Q_REG[l_mca_pos], l_mbastr0_data));
- l_mbastr0_data.writeBit<MCA_MBASTR0Q_CFG_STR_ENABLE>(ENABLE);
- l_mbastr0_data.insertFromRight<MCA_MBASTR0Q_CFG_ENTER_STR_TIME, MCA_MBASTR0Q_CFG_ENTER_STR_TIME_LEN>(TIME_0);
- FAPI_TRY(fapi2::putScom(i_target, MBASTR0Q_REG[l_mca_pos], l_mbastr0_data));
-
- // Step 3 - In MBARPC0Q, enable power domain control.
- l_mbarpc0_data.writeBit<MCA_MBARPC0Q_CFG_MIN_MAX_DOMAINS_ENABLE>(ENABLE);
- FAPI_TRY(fapi2::putScom(i_target, MBARPC0Q_REG[l_mca_pos], l_mbarpc0_data));
- }
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
-/// @brief Helper for trigger_csave. This subroutine assert RESET_n to trigger
-/// the backup on nvdimm
-/// @param[in] i_target - PROC_CHIP targetdefine
-/// @param[in] l_mca_pos - The MCA position relative to the PROC
-/// @return FAPI2_RC_SUCCESS iff setup was successful
-///
-fapi2::ReturnCode assert_resetn( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, const uint8_t l_mca_pos)
-{
- FAPI_ASSERT((l_mca_pos < PORTS_PER_MODULE),
- fapi2::MSS_RESETN_MCA_OUT_OF_RANGE().
- set_PROC_TARGET(i_target).
- set_MCA_POS(l_mca_pos),
- "Invalid port number %u provided", l_mca_pos);
-
- FAPI_DBG("Asserting RESETn on port %d.", l_mca_pos);
-
- {
- fapi2::buffer<uint64_t> l_farb5q_data;
- constexpr uint64_t LOW = 0;
-
- FAPI_TRY(fapi2::getScom(i_target, FARB5Q_REG[l_mca_pos], l_farb5q_data));
- l_farb5q_data.writeBit<MCA_MBA_FARB5Q_CFG_DDR_RESETN>(LOW);
- FAPI_TRY(fapi2::putScom(i_target, FARB5Q_REG[l_mca_pos], l_farb5q_data));
- }
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
-/// @brief Triggers csave on NVDIMM. This subroutine reads ATTR_SBE_NVDIMM_IN_PORT
-/// and fires the trigger to all the ports with NVDIMM plugged. This is written
-/// specifically for SBE.
-/// @param[in] i_target - PROC_CHIP target
-/// @return FAPI2_RC_SUCCESS iff setup was successful
-///
-fapi2::ReturnCode trigger_csave( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target )
-{
- fapi2::buffer<uint8_t> l_nvdimm_port_bitmap = 0;
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_SBE_NVDIMM_IN_PORT, i_target, l_nvdimm_port_bitmap) );
-
- for (uint8_t l_mca_pos = 0; l_mca_pos < PORTS_PER_MODULE; l_mca_pos++)
- {
- if (l_nvdimm_port_bitmap.getBit(l_mca_pos) == fapi2::ENUM_ATTR_SBE_NVDIMM_IN_PORT_YES)
- {
- FAPI_DBG("NVDIMM found in port %d ", l_mca_pos);
-
- // Enter STR
- FAPI_TRY(self_refresh_entry(i_target, l_mca_pos));
-
- // Assert ddr_resetn
- FAPI_TRY(assert_resetn(i_target, l_mca_pos));
- }
- }
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-}//ns nvdimm
-
-}//ns workarounds
-
-}//ns mss
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