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| author | Greg Still <stillgs@us.ibm.com> | 2017-05-30 23:16:35 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-08-20 10:06:25 -0400 |
| commit | cfc8e56e73be3bfd9ad65a760b386b3854f82fe1 (patch) | |
| tree | c51c0fc48e81b89a61de6f54f664effd8a8dcfc5 /src/import | |
| parent | b57e631aed63b6744ac3e45295b099fb0ffa75c6 (diff) | |
| download | talos-hostboot-cfc8e56e73be3bfd9ad65a760b386b3854f82fe1.tar.gz talos-hostboot-cfc8e56e73be3bfd9ad65a760b386b3854f82fe1.zip | |
p9_sbe_select_ex: add fused core booting support
- Reads ATTR_FUSED_CORE_MODE attribute in "single" mode.
- Checks that the first core found is an even core
- Checks that the odd core in the EX associated with the first core is
functional
- Adds the second core to the CCSR in the OCB for istep 4 use.
- Added callouts for Level 3
- Fix error testing bugs
- Addressed callout comments
- Addressed review comments
Change-Id: Id095c1300a96ff52f311836c9dcbe93226014ff0
RTC: 173949
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41149
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: RAJA DAS <rajadas2@in.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43688
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml | 63 |
1 files changed, 54 insertions, 9 deletions
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml index 668715684..6b017b15c 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_sbe_select_ex_errors.xml @@ -30,28 +30,73 @@ <!-- ******************************************************************** --> <hwpError> <sbeError/> - <rc>RC_SBE_SELECT_EX_NO_CORES</rc> - <description>No good cores were found in the Partial Good attribures</description> + <rc>RC_SBE_SELECT_EX_CORE_EQ_CONFIG_ERROR</rc> + <description>Did not find the matching EQ for the first core. + </description> + <ffdc>CHIP</ffdc> + <ffdc>CORE_NUM</ffdc> + <ffdc>EQ_NUM</ffdc> + <callout> + <target>CODE</target> + <priority>HIGH</priority> + </callout> + <callout> + <target>CHIP</target> + <priority>LOW</priority> + </callout> </hwpError> <!-- ******************************************************************** --> <hwpError> <sbeError/> - <rc>RC_SBE_SELECT_EX_NO_EQS</rc> - <description>No good cache chiplets were found in the Partial Good attribures</description> + <rc>RC_SBE_SELECT_EX_NO_CORE_AVAIL_ERROR</rc> + <description>No cores are configurable with current partial good and gard + settings + </description> + <ffdc>CHIP</ffdc> + <callout> + <target>CODE</target> + <priority>HIGH</priority> + </callout> + <callout> + <target>CHIP</target> + <priority>LOW</priority> + </callout> </hwpError> <!-- ******************************************************************** --> <hwpError> <sbeError/> - <rc>RC_SBE_SELECT_EX_CORE_EQ_CONFIG_ERROR</rc> - <description>Did not find the matching EQ for the first core</description> + <rc>RC_SBE_SELECT_EX_FUSED_NOT_EVEN_ERROR</rc> + <description>The first core found in fused mode was not an even core. + </description> + <ffdc>CHIP</ffdc> <ffdc>CORE_NUM</ffdc> - <ffdc>EQ_NUM</ffdc> + <callout> + <target>CODE</target> + <priority>HIGH</priority> + </callout> + <callout> + <target>CHIP</target> + <priority>LOW</priority> + </callout> </hwpError> <!-- ******************************************************************** --> <hwpError> <sbeError/> - <rc>RC_SBE_SELECT_EX_NO_CORE_AVAIL_ERROR</rc> - <description>No cores are configurable with current partial good and gard settings</description> + <rc>RC_SBE_SELECT_EX_FUSED_ODD_ERROR</rc> + <description>The first core found in fused mode was even but the companion + odd core was not functional. + </description> + <ffdc>CHIP</ffdc> + <ffdc>CORE_NUM</ffdc> + <ffdc>MASTER_NUM</ffdc> + <callout> + <target>CODE</target> + <priority>HIGH</priority> + </callout> + <callout> + <target>CHIP</target> + <priority>LOW</priority> + </callout> </hwpError> <!-- ******************************************************************** --> <hwpError> |
