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author | Elizabeth Liner <eliner@us.ibm.com> | 2018-04-05 12:23:34 -0500 |
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committer | William G. Hoffa <wghoffa@us.ibm.com> | 2018-04-09 14:21:40 -0400 |
commit | a027c49b4ca5e60a17746a6eb8c6ca0d89bc6f3f (patch) | |
tree | 94db2fb0d62714c3ac2e4b9b925d098bc422325f /src/import | |
parent | c5ca811838da1d35ecf351b8cdc7a38063dc2dd9 (diff) | |
download | talos-hostboot-a027c49b4ca5e60a17746a6eb8c6ca0d89bc6f3f.tar.gz talos-hostboot-a027c49b4ca5e60a17746a6eb8c6ca0d89bc6f3f.zip |
Temporarily moving attribute to the system target
There were dependency issues between the FSP and hostboot
changes. This commit is temporarily moving everything to the system
target, so that we can get our changes through CI. We'll go back
later and fix the target to the proc
Change-Id: Ic2d63d10afe50342290a814a94fd2d07d7102fdf
RTC:176434
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56814
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56827
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C | 12 | ||||
-rwxr-xr-x | src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml | 12 |
2 files changed, 18 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C b/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C index 02efe855d..636f345be 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C +++ b/src/import/chips/p9/procedures/hwp/perv/p9_setup_sbe_config.C @@ -107,8 +107,8 @@ enum P9_SETUP_SBE_CONFIG_Private_Constants ATTR_PROC_FABRIC_GROUP_ID_LENGTH = 3, ATTR_PROC_FABRIC_CHIP_ID_STARTBIT = 29, ATTR_PROC_FABRIC_CHIP_ID_LENGTH = 3, - ATTR_PROC_CHIP_MEM_TO_USE_STARTBIT = 1, - ATTR_PROC_CHIP_MEM_TO_USE_LENGTH = 6, + ATTR_PROC_MEM_TO_USE_STARTBIT = 1, + ATTR_PROC_MEM_TO_USE_LENGTH = 6, }; @@ -591,13 +591,13 @@ fapi2::ReturnCode p9_setup_sbe_config(const l_read_scratch_reg.insertFromRight< ATTR_PROC_EFF_FABRIC_CHIP_ID_STARTBIT, ATTR_PROC_EFF_FABRIC_CHIP_ID_LENGTH > (l_read_2); - FAPI_DBG("Reading ATTR_PROC_CHIP_MEM_TO_USE"); - FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_CHIP_MEM_TO_USE, i_target_chip, l_proc_chip_mem_to_use)); + FAPI_DBG("Reading ATTR_PROC_MEM_TO_USE"); + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_MEM_TO_USE, i_target_chip, l_proc_chip_mem_to_use)); l_read_scratch_reg.setBit<0>(); // set which proc memory to use - l_read_scratch_reg.insertFromRight<ATTR_PROC_CHIP_MEM_TO_USE_STARTBIT, - ATTR_PROC_CHIP_MEM_TO_USE_LENGTH>(l_proc_chip_mem_to_use); + l_read_scratch_reg.insertFromRight<ATTR_PROC_MEM_TO_USE_STARTBIT, + ATTR_PROC_MEM_TO_USE_LENGTH>(l_proc_chip_mem_to_use); FAPI_DBG("Setting up value of Scratch_reg6"); diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml index d7bd01439..8887d260e 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml @@ -754,6 +754,18 @@ <attribute> <id>ATTR_PROC_CHIP_MEM_TO_USE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description>This attribute denotes where our master proc's memory is + located. In the case that the master-proc does not have usable memory, + we are going to use another proc's memory to boot. The attribute will be + set to the chip and group ID of which proc we want to use.</description> + <valueType>uint8</valueType> + <persistRuntime/> + <platInit/> +</attribute> + +<attribute> + <id>ATTR_PROC_MEM_TO_USE</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description>This attribute denotes where our master proc's memory is located. In the case that the master-proc does not have usable memory, |