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author | Stephen Glancy <sglancy@us.ibm.com> | 2018-10-03 17:37:10 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-10-15 12:41:23 -0500 |
commit | 6ba203356a7cf73fe990ed00dc410981c0f59a79 (patch) | |
tree | 3a45760262fcf509c5f6e3422152d083ae5cf51e /src/import/generic | |
parent | 4992f9d6d9b2f3f5096d27d2883f88c4a2b5f384 (diff) | |
download | talos-hostboot-6ba203356a7cf73fe990ed00dc410981c0f59a79.tar.gz talos-hostboot-6ba203356a7cf73fe990ed00dc410981c0f59a79.zip |
Fixes VPD access and eff_config for LRDIMM's
Change-Id: I82c257122b953f55188b696c0c93ee76d0fed337
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67008
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67019
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/generic')
3 files changed, 69 insertions, 15 deletions
diff --git a/src/import/generic/memory/lib/spd/spd_traits_ddr4.H b/src/import/generic/memory/lib/spd/spd_traits_ddr4.H index 3670a8f89..59ea61fab 100644 --- a/src/import/generic/memory/lib/spd/spd_traits_ddr4.H +++ b/src/import/generic/memory/lib/spd/spd_traits_ddr4.H @@ -3368,7 +3368,7 @@ class readerTraits < fields<DDR4, LRDIMM_MODULE>::DRAM_ODT_RTT_PARK_R01_LTE_1866 { public: - static constexpr size_t COMPARISON_VAL = 0b01; + static constexpr size_t COMPARISON_VAL = 0b111; static constexpr const char* FIELD_STR = "DRAM ODT RTT_PARK, package rank 0, 1 for data rates <= 1866"; template <typename T> @@ -3387,7 +3387,7 @@ class readerTraits < fields<DDR4, LRDIMM_MODULE>::DRAM_ODT_RTT_PARK_R01_LTE_2400 { public: - static constexpr size_t COMPARISON_VAL = 0b01; + static constexpr size_t COMPARISON_VAL = 0b111; static constexpr const char* FIELD_STR = "DRAM ODT RTT_PARK, package rank 0, 1 for 1866 < data rates <= 2400"; template <typename T> @@ -3406,7 +3406,7 @@ class readerTraits < fields<DDR4, LRDIMM_MODULE>::DRAM_ODT_RTT_PARK_R01_LTE_3200 { public: - static constexpr size_t COMPARISON_VAL = 0b01; + static constexpr size_t COMPARISON_VAL = 0b111; static constexpr const char* FIELD_STR = "DRAM ODT RTT_PARK, package rank 0, 1 for 2400 < data rates <= 3200"; template <typename T> @@ -3425,7 +3425,7 @@ class readerTraits < fields<DDR4, LRDIMM_MODULE>::DRAM_ODT_RTT_PARK_R23_LTE_1866 { public: - static constexpr size_t COMPARISON_VAL = 0b01; + static constexpr size_t COMPARISON_VAL = 0b111; static constexpr const char* FIELD_STR = "DRAM ODT RTT_PARK, package rank 2, 3 for data rates <= 1866"; template <typename T> @@ -3444,7 +3444,7 @@ class readerTraits < fields<DDR4, LRDIMM_MODULE>::DRAM_ODT_RTT_PARK_R23_LTE_2400 { public: - static constexpr size_t COMPARISON_VAL = 0b01; + static constexpr size_t COMPARISON_VAL = 0b111; static constexpr const char* FIELD_STR = "DRAM ODT RTT_PARK, package rank 2, 3 for 1866 < data rates <= 2400"; template <typename T> @@ -3463,7 +3463,7 @@ class readerTraits < fields<DDR4, LRDIMM_MODULE>::DRAM_ODT_RTT_PARK_R23_LTE_3200 { public: - static constexpr size_t COMPARISON_VAL = 0b01; + static constexpr size_t COMPARISON_VAL = 0b111; static constexpr const char* FIELD_STR = "DRAM ODT RTT_PARK, package rank 2, 3 for 2400 < data rates <= 3200"; template <typename T> diff --git a/src/import/generic/memory/lib/utils/freq/gen_mss_freq.H b/src/import/generic/memory/lib/utils/freq/gen_mss_freq.H index 655146f87..5abfbfc00 100644 --- a/src/import/generic/memory/lib/utils/freq/gen_mss_freq.H +++ b/src/import/generic/memory/lib/utils/freq/gen_mss_freq.H @@ -43,6 +43,7 @@ #include <generic/memory/lib/utils/freq/cas_latency.H> #include <generic/memory/lib/utils/freq/mss_freq_scoreboard.H> #include <generic/memory/lib/data_engine/pre_data_init.H> +#include <generic/memory/lib/utils/count_dimm.H> #include <vpd_access.H> namespace mss @@ -75,8 +76,8 @@ fapi2::ReturnCode set_freq(const fapi2::Target<T>& i_target, /// @brief Gets the number of master ranks per DIMM /// @tparam P mss::proc_type on which to operate /// @tparam T fapi2::TargetType on which to set the frequency -/// @param[in] i_target the target on which to set the frequency values -/// @param[out] o_master_ranks number of master ranks per DIMM +/// @param[in] i_target the target on which to get the number of master ranks per DIMM +/// @param[out] o_master_ranks number of master ranks per DIMM /// @return FAPI2_RC_SUCCESS iff ok /// template<mss::proc_type P, fapi2::TargetType T> @@ -84,6 +85,63 @@ fapi2::ReturnCode get_master_rank_per_dimm(const fapi2::Target<T>& i_target, uint8_t* o_master_ranks); /// +/// @brief Gets the number of master ranks per DIMM +/// @tparam P mss::proc_type on which to operate +/// @tparam T fapi2::TargetType on which to get the DIMM types +/// @param[in] i_target the target on which to get the DIMM types +/// @param[out] o_dimm_type DIMM types +/// @return FAPI2_RC_SUCCESS iff ok +/// +template<mss::proc_type P, fapi2::TargetType T> +fapi2::ReturnCode get_dimm_type(const fapi2::Target<T>& i_target, + uint8_t* o_dimm_type); + +/// +/// @brief Configures the number of ranks in the VPD accessor dependent upon DIMM type +/// @tparam P mss::proc_type on which to operate +/// @tparam TT Traits associated with the processor type +/// @param[in] i_target the target on which to set the frequency values +/// @param[in,out] io_vpd_info VPD information that needs to be configured +/// @return FAPI2_RC_SUCCESS iff ok +/// +template<mss::proc_type P, typename TT = mss::frequency_traits<P>> +fapi2::ReturnCode configure_vpd_ranks(const fapi2::Target<TT::PORT_TARGET_TYPE>& i_target, + fapi2::VPDInfo<TT::VPD_TARGET_TYPE>& io_vpd_info) +{ + uint8_t l_rank_count_dimm[TT::MAX_DIMM_PER_PORT] = {}; + uint8_t l_dimm_type[TT::MAX_DIMM_PER_PORT] = {}; + + // ATTR to update + // Note: this flat out assumes that we have two DIMM per port max. This goes against the directive to have arrays be dynamic in length and derived from ATTR's + FAPI_TRY( get_master_rank_per_dimm<P>(i_target, &(l_rank_count_dimm[0])) ); + FAPI_TRY( get_dimm_type<P>(i_target, &(l_dimm_type[0])) ); + + // So for LRDIMM, our SI works a bit differently than for non-LRDIMM + // LRDIMM's have buffers that operate on a per-DIMM basis across multiple ranks + // As such, they act as a single load, similar to a 1R DIMM would + // per the IBM signal integrity team, the 1R DIMM settings should be used for LRDIMM's + // So, if we are LRDIMM's and have ranks, we want to only note it as a 1R DIMM for purposes of querying the VPD + FAPI_DBG("%s for DIMM 0 rank count %u dimm type %u %s", + mss::c_str(i_target), l_rank_count_dimm[0], l_dimm_type[0], l_dimm_type[0] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM"); + FAPI_DBG("%s for DIMM 1 rank count %u dimm type %u %s", + mss::c_str(i_target), l_rank_count_dimm[1], l_dimm_type[1], l_dimm_type[1] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM"); + + l_rank_count_dimm[0] = ((l_dimm_type[0] == TT::LRDIMM_TYPE) && (l_rank_count_dimm[0] > 0)) ? 1 : l_rank_count_dimm[0]; + l_rank_count_dimm[1] = ((l_dimm_type[1] == TT::LRDIMM_TYPE) && (l_rank_count_dimm[1] > 0)) ? 1 : l_rank_count_dimm[1]; + + FAPI_DBG("after LR modification %s for DIMM 0 rank count %u dimm type %u %s", + mss::c_str(i_target), l_rank_count_dimm[0], l_dimm_type[0], l_dimm_type[0] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM"); + FAPI_DBG("after LR modification %s for DIMM 1 rank count %u dimm type %u %s", + mss::c_str(i_target), l_rank_count_dimm[1], l_dimm_type[1], l_dimm_type[1] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM"); + + io_vpd_info.iv_rank_count_dimm_0 = l_rank_count_dimm[0]; + io_vpd_info.iv_rank_count_dimm_1 = l_rank_count_dimm[1]; + +fapi_try_exit: + return fapi2::current_err; +} + +/// /// @brief Sets frequency attributes /// @tparam P mss::proc_type on which to operate /// @tparam TT Traits associated with the processor type @@ -208,7 +266,6 @@ template<mss::proc_type P, typename TT = mss::frequency_traits<P>> fapi2::ReturnCode vpd_supported_freqs( const fapi2::Target<TT::FREQ_TARGET_TYPE>& i_target, std::vector<std::vector<uint32_t>>& o_vpd_supported_freqs) { - uint8_t l_rank_count_dimm[TT::MAX_DIMM_PER_PORT] = {}; uint8_t l_vpd_blob[TT::VPD_KEYWORD_MAX] = {}; // This bitmap will keep track of the ports we visit. @@ -244,12 +301,8 @@ fapi2::ReturnCode vpd_supported_freqs( const fapi2::Target<TT::FREQ_TARGET_TYPE> continue; } - // ATTR to update - // Note: this flat out assumes that we have two DIMM per port max. This goes against the directive to have arrays be dynamic in length and derived from ATTR's - FAPI_TRY( get_master_rank_per_dimm<P>(p, &(l_rank_count_dimm[0])) ); - - l_vpd_info.iv_rank_count_dimm_0 = l_rank_count_dimm[0]; - l_vpd_info.iv_rank_count_dimm_1 = l_rank_count_dimm[1]; + // Configures the number of ranks for the VPD configuration + FAPI_TRY( configure_vpd_ranks<P>(p, l_vpd_info), "%s failed to configure VPD ranks", mss::c_str(p)); l_vpd_info.iv_is_config_ffdc_enabled = false; // Iterate through all supported memory freqs diff --git a/src/import/generic/memory/lib/utils/freq/gen_mss_freq_traits.H b/src/import/generic/memory/lib/utils/freq/gen_mss_freq_traits.H index ba63170ed..791fa5b97 100644 --- a/src/import/generic/memory/lib/utils/freq/gen_mss_freq_traits.H +++ b/src/import/generic/memory/lib/utils/freq/gen_mss_freq_traits.H @@ -83,6 +83,7 @@ class frequency_traits<mss::proc_type::NIMBUS> static constexpr uint64_t VPD_KEYWORD_MAX = 255; static constexpr const char* VPD_BLOB_NAME = "MR"; static constexpr auto VPD_BLOB = fapi2::MemVpdData::MR; + static constexpr auto LRDIMM_TYPE = fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM; // Coding minion, why have these explicitly defined frequency values? // Isn't the supported frequency vector used for this purpose? |