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author | Louis Stermole <stermole@us.ibm.com> | 2018-12-17 08:46:03 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-01-18 15:31:48 -0600 |
commit | 6a5388bbc8b066a9547e1e1268e8c3a7e9f33291 (patch) | |
tree | a115d377478498ccc3ad9e13a53652f90afa8635 /src/import/generic | |
parent | 38c63b67d8d0faf64c8ec89035889a5deed4d60a (diff) | |
download | talos-hostboot-6a5388bbc8b066a9547e1e1268e8c3a7e9f33291.tar.gz talos-hostboot-6a5388bbc8b066a9547e1e1268e8c3a7e9f33291.zip |
Add new MSS attributes for Axone
ATTR_MEM_MRW_IS_PLANAR
ATTR_MEM_EFF_DIMM_SPARE
ATTR_MEM_VPD_DQ_MAP
Change-Id: I36915bf7aa8c6fffc3e8b27aea595d9feb1760dc
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69903
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69913
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/generic')
-rw-r--r-- | src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml | 19 | ||||
-rw-r--r-- | src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml | 15 |
2 files changed, 33 insertions, 1 deletions
diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml index 4f29962f8..9b5d3a271 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml @@ -5,7 +5,7 @@ <!-- --> <!-- OpenPOWER HostBoot Project --> <!-- --> -<!-- Contributors Listed Below - COPYRIGHT 2016,2018 --> +<!-- Contributors Listed Below - COPYRIGHT 2016,2019 --> <!-- [+] International Business Machines Corp. --> <!-- --> <!-- --> @@ -78,4 +78,21 @@ <mssAccessorName>mem_2n_mode</mssAccessorName> </attribute> + <attribute> + <id>ATTR_MEM_VPD_DQ_MAP</id> + <targetType>TARGET_TYPE_MEM_PORT</targetType> + <description> + [Dimm DQ PIN] The map from the Dual Inline Memory Module + (DIMM) Data (DQ) Pin to the Module Package Data (DQ) Pinout + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <writeable/> + <mssUnits></mssUnits> + <mssBlobStart>0</mssBlobStart> + <mssBlobLength>72</mssBlobLength> + <mssAccessorName>mem_vpd_dq_map</mssAccessorName> + <array>72</array> + </attribute> + </attributes> diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml index 476e3551c..ba699ad18 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_mrw_attributes.xml @@ -23,4 +23,19 @@ <!-- --> <!-- IBM_PROLOG_END_TAG --> <attributes> + <attribute> + <id>ATTR_MEM_MRW_IS_PLANAR</id> + <targetType>TARGET_TYPE_OCMB_CHIP</targetType> + <description> + Indicates if the DIMM connected to this controller + are in a planar configuration + </description> + <valueType>uint8</valueType> + <enum>FALSE = 0x00, TRUE = 0x01</enum> + <platInit/> + <default>FALSE</default> + <initToZero/> + <mssAccessorName>mem_mrw_is_planar</mssAccessorName> + </attribute> + </attributes> |