summaryrefslogtreecommitdiffstats
path: root/src/import/generic
diff options
context:
space:
mode:
authorStephen Glancy <sglancy@us.ibm.com>2019-05-14 12:45:57 -0400
committerDaniel M. Crowell <dcrowell@us.ibm.com>2019-06-11 12:38:43 -0500
commit11066067e94b1924b331d6b918b64129dfde5bd2 (patch)
treeb4aba2157636e26e480892fd2781c8b4f452b527 /src/import/generic
parent2aaca494ec04b76ae31047ec486f2a371504a5b9 (diff)
downloadtalos-hostboot-11066067e94b1924b331d6b918b64129dfde5bd2.tar.gz
talos-hostboot-11066067e94b1924b331d6b918b64129dfde5bd2.zip
Fixes FFDC for files moved to generic
Change-Id: Ibd639646548cfe0745127419c151a67635e8ae75 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77343 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77422 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/generic')
-rw-r--r--src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H18
-rw-r--r--src/import/generic/memory/lib/spd/spd_checker.H5
-rw-r--r--src/import/generic/memory/lib/utils/freq/gen_mss_freq.H2
-rw-r--r--src/import/generic/memory/lib/utils/freq/mss_freq_scoreboard.H2
-rw-r--r--src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H28
-rw-r--r--src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H28
-rw-r--r--src/import/generic/procedures/xml/error_info/generic_error.xml349
7 files changed, 387 insertions, 45 deletions
diff --git a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H
index 12821c76f..1ebd48115 100644
--- a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H
+++ b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H
@@ -493,7 +493,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_twrmin_msn, l_twrmin_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS12>(i_target, l_buffer, TWRMIN));
+ FAPI_TRY( check::max_timing_range<BITS12>(i_target, l_buffer, U, TWRMIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Write Recovery Time (tWRmin) in MTB units: %d",
@@ -526,7 +526,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_twtr_lmin_msn, l_twtr_lmin_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS12>(i_target, l_buffer, TWTR_L_MIN));
+ FAPI_TRY( check::max_timing_range<BITS12>(i_target, l_buffer, U, TWTR_L_MIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Write to Read Time - Different Bank Group (tWTR_Lmin) in MTB units: %d",
@@ -560,7 +560,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_twtr_smin_msn, l_twtr_smin_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS12>(i_target, l_buffer, TWTR_S_MIN));
+ FAPI_TRY( check::max_timing_range<BITS12>(i_target, l_buffer, U, TWTR_S_MIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Write to Read Time - Different Bank Group (tWTR_Smin) in MTB units: %d",
@@ -1275,7 +1275,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_tRASmin_msn, l_tRASmin_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS12>(iv_target, l_buffer, TRASMIN));
+ FAPI_TRY( check::max_timing_range<BITS12>(iv_target, l_buffer, R, TRASMIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Active to Precharge Delay Time (tRASmin) in MTB units: %d",
@@ -1305,7 +1305,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_trcmin_msn, l_trcmin_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS12>(iv_target, l_buffer, TRCMIN));
+ FAPI_TRY( check::max_timing_range<BITS12>(iv_target, l_buffer, R, TRCMIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Active to Active/Refresh Delay Time (tRCmin) in MTB units: %d",
@@ -1336,7 +1336,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_trfc1min_msb, l_trfc1min_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS16>(iv_target, l_buffer, TRFC1MIN));
+ FAPI_TRY( check::max_timing_range<BITS16>(iv_target, l_buffer, R, TRFC1MIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Refresh Recovery Delay Time 1 (tRFC1min) in MTB units: %d",
@@ -1366,7 +1366,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_trfc2min_msb, l_trfc2min_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS16>(iv_target, l_buffer, TRFC2MIN));
+ FAPI_TRY( check::max_timing_range<BITS16>(iv_target, l_buffer, R, TRFC2MIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Refresh Recovery Delay Time 2 (tRFC2min) in MTB units: %d",
@@ -1396,7 +1396,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_trfc4min_msb, l_trfc4min_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS16>(iv_target, l_buffer, TRFC4MIN));
+ FAPI_TRY( check::max_timing_range<BITS16>(iv_target, l_buffer, R, TRFC4MIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Refresh Recovery Delay Time 4 (tRFC4min) in MTB units: %d",
@@ -1426,7 +1426,7 @@ class decoder<DDR4, BASE_CNFG, R> : public base_cnfg_decoder
right_aligned_insert(l_buffer, l_tfawmin_msn, l_tfawmin_lsb);
// Update output only after check passes
- FAPI_TRY( check::max_timing_range<BITS12>(iv_target, l_buffer, TFAWMIN));
+ FAPI_TRY( check::max_timing_range<BITS12>(iv_target, l_buffer, R, TFAWMIN));
o_value = l_buffer;
FAPI_INF("%s. Minimum Four Activate Window Delay Time (tFAWmin) in MTB units: %d",
diff --git a/src/import/generic/memory/lib/spd/spd_checker.H b/src/import/generic/memory/lib/spd/spd_checker.H
index 0b2a33076..50e6ef347 100644
--- a/src/import/generic/memory/lib/spd/spd_checker.H
+++ b/src/import/generic/memory/lib/spd/spd_checker.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2017 */
+/* Contributors Listed Below - COPYRIGHT 2017,2019 */
/* [+] Evan Lojewski */
/* [+] International Business Machines Corp. */
/* */
@@ -103,17 +103,20 @@ namespace check
/// @tparam TT defaulted to bitRangeTraits<TB>
/// @param[in] i_target fapi2 target
/// @param[in] i_timing the timing value
+/// @param[in] i_rev the SPD revision that needs to be checked
/// @param[in] i_ffdc ffdc function code
/// @return FAPI2_RC_SUCCESS iff okay
///
template < bit_len BL, fapi2::TargetType T, typename TT = bitRangeTraits<BL> >
fapi2::ReturnCode max_timing_range(const fapi2::Target<T>& i_target,
const int64_t i_timing,
+ const rev i_rev,
const generic_ffdc_codes i_ffdc)
{
FAPI_ASSERT( (i_timing <= TT::UPPER_BOUND) &&
(i_timing >= TT::LOWER_BOUND),
fapi2::MSS_SPD_TIMING_FAIL()
+ .set_FAILED_REVISION(i_rev)
.set_FUNCTION_CODE(i_ffdc)
.set_TARGET(i_target),
"Failed timing parameter check for %s",
diff --git a/src/import/generic/memory/lib/utils/freq/gen_mss_freq.H b/src/import/generic/memory/lib/utils/freq/gen_mss_freq.H
index 4df0eeb06..c1c51cd87 100644
--- a/src/import/generic/memory/lib/utils/freq/gen_mss_freq.H
+++ b/src/import/generic/memory/lib/utils/freq/gen_mss_freq.H
@@ -164,7 +164,7 @@ fapi2::ReturnCode is_vpd_config_supported( const fapi2::Target<TT::VPD_TARGET_TY
set_MAX(VPD_KW_MAX).
set_ACTUAL(io_vpd_info.iv_size).
set_KEYWORD(VPD_BLOB).
- set_MCS_TARGET(i_target),
+ set_VPD_TARGET(i_target),
"VPD MR keyword size retrieved: %d, is larger than max: %d for %s",
io_vpd_info.iv_size, TT::VPD_KEYWORD_MAX, mss::c_str(i_target));
}
diff --git a/src/import/generic/memory/lib/utils/freq/mss_freq_scoreboard.H b/src/import/generic/memory/lib/utils/freq/mss_freq_scoreboard.H
index 3b2f7ded9..11256000a 100644
--- a/src/import/generic/memory/lib/utils/freq/mss_freq_scoreboard.H
+++ b/src/import/generic/memory/lib/utils/freq/mss_freq_scoreboard.H
@@ -563,7 +563,7 @@ inline fapi2::ReturnCode limit_freq_by_mrw(const fapi2::Target<TT::FREQ_TARGET_T
fapi2::MSS_MAX_FREQ_ATTR_SIZE_CHANGED()
.set_ACTUAL_SIZE(i_max_mrw_freqs.size())
.set_SUPPOSED_SIZE(NUM_MAX_FREQS)
- .set_MCA_TARGET(i_target),
+ .set_PORT_TARGET(i_target),
"%s Incorrect number of max frequencies in attribute for (%d)",
mss::c_str(i_target),
i_max_mrw_freqs.size());
diff --git a/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H b/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H
index 6ac15c3c3..2fbe18d25 100644
--- a/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H
+++ b/src/import/generic/memory/lib/utils/mcbist/gen_mss_mcbist.H
@@ -2128,6 +2128,9 @@ class program
///
inline fapi2::ReturnCode process_errors( const fapi2::Target<T> i_target ) const
{
+ // MCBIST error traits
+ using ET = mcbistMCTraits<DEFAULT_MC_TYPE>;
+
// Until reading the error array is documented, comparison errors 'just' result in
// a flag indicating there was a problem on port.
{
@@ -2144,8 +2147,8 @@ class program
l_data.extractToRight<TT::SUBTEST_NUM_INDICATOR, TT::SUBTEST_NUM_INDICATOR_LEN>(l_subtest);
FAPI_ASSERT( l_port == 0,
- fapi2::MSS_MEMDIAGS_COMPARE_ERROR_IN_LAST_PATTERN()
- .set_MCBIST_TARGET(i_target)
+ ET::memdiags_compare_error_in_last_pattern()
+ .set_MC_TARGET(i_target)
.set_PORT(mss::first_bit_set(l_port))
.set_SUBTEST(l_subtest),
"%s MCBIST error on port %d subtest %d", mss::c_str(i_target), mss::first_bit_set(l_port), l_subtest );
@@ -2160,8 +2163,8 @@ class program
FAPI_TRY( fapi2::getScom(i_target, TT::SRERR1_REG, l_read1), "%s Failed getScom", mss::c_str(i_target) );
FAPI_ASSERT( ((l_read0 == 0) && (l_read1 == 0)),
- fapi2::MSS_MEMDIAGS_ERROR_IN_LAST_PATTERN()
- .set_MCBIST_TARGET(i_target)
+ ET::memdiags_error_in_last_pattern()
+ .set_MC_TARGET(i_target)
.set_STATUS0(l_read0)
.set_STATUS1(l_read1),
"%s MCBIST scrub/read error reg0: 0x%016lx reg1: 0x%016lx", mss::c_str(i_target), l_read0, l_read1 );
@@ -3477,6 +3480,7 @@ fapi2::ReturnCode read_rb_array(const fapi2::Target<T>& i_target,
template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = mcbistTraits<MC, T> >
fapi2::ReturnCode poll( const fapi2::Target<T>& i_target, const program<MC>& i_program )
{
+ using ET = mss::mcbistMCTraits<MC>;
fapi2::buffer<uint64_t> l_status;
const uint64_t l_done = fapi2::buffer<uint64_t>().setBit<TT::MCBIST_DONE>();
@@ -3500,7 +3504,7 @@ fapi2::ReturnCode poll( const fapi2::Target<T>& i_target, const program<MC>& i_p
// Check to see if we're still in progress - meaning we timed out.
FAPI_ASSERT((l_status & l_in_progress) != l_in_progress,
- fapi2::MSS_MCBIST_TIMEOUT().set_MCBIST_TARGET(i_target),
+ ET::mcbist_timeout().set_MC_TARGET(i_target),
"MCBIST timed out %s", mss::c_str(i_target));
// The control register has a bit for done-and-happy and a bit for done-and-unhappy
@@ -3513,8 +3517,8 @@ fapi2::ReturnCode poll( const fapi2::Target<T>& i_target, const program<MC>& i_p
// If we're here there were no errors, but lets report if the fail bit was set anyway.
FAPI_ASSERT( (l_status & l_fail) != l_fail,
- fapi2::MSS_MCBIST_UNKNOWN_FAILURE()
- .set_MCBIST_TARGET(i_target)
+ ET::mcbist_unknown_failure()
+ .set_MC_TARGET(i_target)
.set_STATUS_REGISTER(l_status),
"%s MCBIST reported a fail, but process_errors didn't find it 0x%016llx",
mss::c_str(i_target), l_status );
@@ -3524,8 +3528,8 @@ fapi2::ReturnCode poll( const fapi2::Target<T>& i_target, const program<MC>& i_p
}
FAPI_ASSERT(false,
- fapi2::MSS_MCBIST_DATA_FAIL()
- .set_MCBIST_TARGET(i_target)
+ ET::mcbist_data_fail()
+ .set_MC_TARGET(i_target)
.set_STATUS_REGISTER(l_status),
"%s MCBIST executed but we got corrupted data in the control register 0x%016llx",
mss::c_str(i_target), l_status );
@@ -3563,7 +3567,7 @@ fapi_try_exit:
/// @param[in] i_program the mcbist program to execute
/// @return fapi2::ReturnCode, FAPI2_RC_SUCCESS iff OK
///
-template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = mcbistTraits<MC, T> >
+template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = mcbistTraits<MC, T>, typename ET = mcbistMCTraits<MC> >
fapi2::ReturnCode execute( const fapi2::Target<T>& i_target, const program<MC>& i_program )
{
fapi2::buffer<uint64_t> l_status;
@@ -3576,7 +3580,7 @@ fapi2::ReturnCode execute( const fapi2::Target<T>& i_target, const program<MC>&
// Before we go off into the bushes, lets see if there are any instructions in the
// program. If not, we can save everyone the hassle
FAPI_ASSERT(0 != i_program.iv_subtests.size(),
- fapi2::MSS_MEMDIAGS_NO_MCBIST_SUBTESTS().set_MCBIST_TARGET(i_target),
+ fapi2::MSS_MEMDIAGS_NO_MCBIST_SUBTESTS().set_MC_TARGET(i_target),
"Attempt to run an MCBIST program with no subtests on %s", mss::c_str(i_target));
FAPI_TRY( clear_error_helper<MC>(i_target, const_cast<program<MC>&>(i_program)) );
@@ -3625,7 +3629,7 @@ fapi2::ReturnCode execute( const fapi2::Target<T>& i_target, const program<MC>&
// So we've either run/are running or we timed out waiting for the start.
FAPI_ASSERT( l_poll_result == true,
- fapi2::MSS_MEMDIAGS_MCBIST_FAILED_TO_START().set_MCBIST_TARGET(i_target),
+ ET::memdiags_failed_to_start().set_MC_TARGET(i_target),
"The MCBIST engine failed to start its program" );
// If the user asked for async mode, we can leave. Otherwise, poll and check for errors
diff --git a/src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H b/src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H
index 7464675a5..33a3156f3 100644
--- a/src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H
+++ b/src/import/generic/memory/lib/utils/mcbist/gen_mss_memdiags.H
@@ -226,6 +226,7 @@ fapi2::ReturnCode stop( const fapi2::Target<T>& i_target )
{
// Too long, make shorter
using TT = mss::mcbistTraits<MC, T>;
+ using ET = mss::mcbistMCTraits<MC>;
// Poll parameters are defined as TK so that we wait a nice time for operations
// For now use the defaults
@@ -257,8 +258,8 @@ fapi2::ReturnCode stop( const fapi2::Target<T>& i_target )
// So we've either stopped or we timed out
FAPI_ASSERT( l_poll_result == true,
- fapi2::MSS_MEMDIAGS_MCBIST_FAILED_TO_STOP()
- .set_MCBIST_TARGET(i_target)
+ ET::memdiags_failed_to_stop()
+ .set_MC_TARGET(i_target)
.set_POLL_COUNT(l_poll_parameters.iv_poll_count),
"%s The MCBIST engine failed to stop its program",
mss::c_str(i_target) );
@@ -448,6 +449,7 @@ fapi_try_exit:
template< mss::mc_type MC, fapi2::TargetType T, typename TT >
inline fapi2::ReturnCode operation<MC, T, TT>::single_port_init()
{
+ using ET = mcbistMCTraits<MC>;
FAPI_INF("single port init for %s", mss::c_str(iv_target));
const uint64_t l_relative_port_number = iv_const.iv_start_address.get_port();
@@ -455,10 +457,10 @@ inline fapi2::ReturnCode operation<MC, T, TT>::single_port_init()
// Make sure the specificed port is functional
FAPI_ASSERT( mss::is_functional<TT::PORT_TYPE>(iv_target, l_relative_port_number),
- fapi2::MSS_MEMDIAGS_PORT_NOT_FUNCTIONAL()
+ ET::memdiags_port_not_functional()
.set_RELATIVE_PORT_POSITION(l_relative_port_number)
.set_ADDRESS( uint64_t(iv_const.iv_start_address) )
- .set_MCBIST_TARGET(iv_target),
+ .set_MC_TARGET(iv_target),
"Port with relative postion %d is not functional for %s",
l_relative_port_number, mss::c_str(iv_target));
@@ -846,6 +848,7 @@ template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T >
fapi2::ReturnCode sf_init( const fapi2::Target<T>& i_target,
const uint64_t i_pattern = PATTERN_0 )
{
+ using ET = mss::mcbistMCTraits<MC>;
FAPI_INF("superfast init start for %s", mss::c_str(i_target));
uint8_t l_sim = false;
@@ -866,7 +869,7 @@ fapi2::ReturnCode sf_init( const fapi2::Target<T>& i_target,
sf_init_operation<MC> l_init_op(i_target, l_const, l_rc);
FAPI_ASSERT( l_rc == fapi2::FAPI2_RC_SUCCESS,
- fapi2::MSS_MEMDIAGS_SUPERFAST_INIT_FAILED_TO_INIT().set_MCBIST_TARGET(i_target),
+ ET::memdiags_sf_init_failed_init().set_MC_TARGET(i_target),
"Unable to initialize the MCBIST engine for a sf read %s", mss::c_str(i_target) );
return l_init_op.execute();
@@ -901,6 +904,7 @@ fapi2::ReturnCode sf_read( const fapi2::Target<T>& i_target,
const end_boundary i_end = end_boundary::STOP_AFTER_SLAVE_RANK,
const mss::mcbist::address& i_end_address = mss::mcbist::address(TT::LARGEST_ADDRESS) )
{
+ using ET = mss::mcbistMCTraits<MC>;
FAPI_INF("superfast read - start for %s", mss::c_str(i_target));
fapi2::ReturnCode l_rc;
@@ -908,7 +912,7 @@ fapi2::ReturnCode sf_read( const fapi2::Target<T>& i_target,
sf_read_operation<MC> l_read_op(i_target, l_const, l_rc);
FAPI_ASSERT( l_rc == fapi2::FAPI2_RC_SUCCESS,
- fapi2::MSS_MEMDIAGS_SUPERFAST_READ_FAILED_TO_INIT().set_MCBIST_TARGET(i_target),
+ ET::memdiags_sf_init_failed_init().set_MC_TARGET(i_target),
"Unable to initialize the MCBIST engine for a sf read %s", mss::c_str(i_target) );
return l_read_op.execute();
@@ -936,6 +940,7 @@ fapi2::ReturnCode background_scrub( const fapi2::Target<T>& i_target,
const speed i_speed,
const mss::mcbist::address& i_address )
{
+ using ET = mss::mcbistMCTraits<MC>;
FAPI_INF("continuous (background) scrub for %s", mss::c_str(i_target));
fapi2::ReturnCode l_rc;
@@ -943,7 +948,7 @@ fapi2::ReturnCode background_scrub( const fapi2::Target<T>& i_target,
continuous_scrub_operation<MC> l_op(i_target, l_const, l_rc);
FAPI_ASSERT( l_rc == fapi2::FAPI2_RC_SUCCESS,
- fapi2::MSS_MEMDIAGS_CONTINUOUS_SCRUB_FAILED_TO_INIT().set_MCBIST_TARGET(i_target),
+ ET::memdiags_continuous_scrub_failed_init().set_MC_TARGET(i_target),
"Unable to initialize the MCBIST engine for a continuous scrub %s", mss::c_str(i_target) );
return l_op.execute();
@@ -974,6 +979,7 @@ fapi2::ReturnCode targeted_scrub( const fapi2::Target<T>& i_target,
const mss::mcbist::address& i_end_address,
const end_boundary i_end )
{
+ using ET = mss::mcbistMCTraits<MC>;
FAPI_INF("targeted scrub for %s", mss::c_str(i_target));
fapi2::ReturnCode l_rc;
@@ -981,7 +987,7 @@ fapi2::ReturnCode targeted_scrub( const fapi2::Target<T>& i_target,
targeted_scrub_operation<MC> l_op(i_target, l_const, l_rc);
FAPI_ASSERT( l_rc == fapi2::FAPI2_RC_SUCCESS,
- fapi2::MSS_MEMDIAGS_TARGETED_SCRUB_FAILED_TO_INIT().set_MCBIST_TARGET(i_target),
+ ET::memdiags_targeted_scrub_failed_init().set_MC_TARGET(i_target),
"Unable to initialize the MCBIST engine for a targeted scrub %s", mss::c_str(i_target) );
return l_op.execute();
@@ -1010,6 +1016,7 @@ fapi2::ReturnCode continue_cmd( const fapi2::Target<T>& i_target,
{
// Too long, make shorter
using TT = mss::mcbistTraits<MC, T>;
+ using ET = mss::mcbistMCTraits<MC>;
// We can use a local mcbist::program to help with the bit processing, and then write just the registers we touch.
mss::mcbist::program<MC> l_program;
@@ -1067,7 +1074,7 @@ fapi2::ReturnCode continue_cmd( const fapi2::Target<T>& i_target,
};
FAPI_ASSERT( l_stopped_at_boundary == false,
- fapi2::MSS_MEMDIAGS_ALREADY_AT_BOUNDARY().set_MCBIST_TARGET(i_target).set_BOUNDARY(i_stop),
+ ET::memdiags_already_at_boundary().set_MC_TARGET(i_target).set_BOUNDARY(i_stop),
"Asked to stop at a boundary, but we're already there" );
// Ok, if we're here either we need to change the stop and boundary conditions.
@@ -1118,6 +1125,7 @@ fapi_try_exit:
template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = mcbistTraits<MC, T> >
fapi2::ReturnCode mss_scrub_helper(const fapi2::Target<T>& i_target )
{
+ using ET = mss::mcbistMCTraits<MC>;
FAPI_INF("Start mss_scrub_helper for %s", mss::c_str(i_target));
// If there are no DIMM we don't need to bother. In fact, we can't as we didn't setup
@@ -1183,7 +1191,7 @@ fapi2::ReturnCode mss_scrub_helper(const fapi2::Target<T>& i_target )
l_probes);
FAPI_ASSERT( l_poll_results == true,
- fapi2::MSS_MEMDIAGS_SUPERFAST_INIT_FAILED_TO_INIT().set_MCBIST_TARGET(i_target),
+ ET::memdiags_sf_init_failed_init().set_MC_TARGET(i_target),
"p9_mss_scrub (init) timedout %s", mss::c_str(i_target) );
// Unmask firs after memdiags and turn off FIFO mode
diff --git a/src/import/generic/procedures/xml/error_info/generic_error.xml b/src/import/generic/procedures/xml/error_info/generic_error.xml
index 08a7ef84a..af5fb64f0 100644
--- a/src/import/generic/procedures/xml/error_info/generic_error.xml
+++ b/src/import/generic/procedures/xml/error_info/generic_error.xml
@@ -68,6 +68,27 @@
</hwpError>
<hwpError>
+ <rc>RC_MSS_FAILED_SPD_REVISION_FALLBACK</rc>
+ <description>
+ Unable to fall back SPD decoder to the highest decoded
+ revision. Most likely a programming error.
+ </description>
+ <ffdc>FAILED_REVISION</ffdc>
+ <ffdc>FUNCTION_CODE</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ <callout>
+ <target>TARGET</target>
+ <priority>MEDIUM</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET</target>
+ </deconfigure>
+ </hwpError>
+
+ <hwpError>
<rc>RC_MSS_FREQ_CL_EXCEEDS_TAA_MAX</rc>
<description>
Calculated Cas Latency exceeds JEDEC value for TAA Max
@@ -129,6 +150,17 @@
</hwpError>
<hwpError>
+ <rc>RC_MSS_FREQ_INDEX_TOO_LARGE</rc>
+ <description>Error calculating the index into max_freq array</description>
+ <ffdc>INDEX</ffdc>
+ <ffdc>NUM_MAX_FREQS</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
<rc>RC_MSS_FREQ_INVALID_CALCULATED_TCK</rc>
<description>
Invalid value clock period (less than equal 0).
@@ -204,6 +236,18 @@
</callout>
</hwpError>
+ <hwpError>
+ <rc>RC_MSS_INVALID_CAST_CALC_NCK</rc>
+ <description>Invalid cast or calculation for calc_nck</description>
+ <ffdc>TIMING_PS</ffdc>
+ <ffdc>NCK_NS</ffdc>
+ <ffdc>CORRECTION_FACTOR</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
<hwpError>
<rc>RC_MSS_INVALID_CLOCK_PERIOD</rc>
<description>
@@ -216,17 +260,144 @@
</callout>
</hwpError>
-<hwpError>
- <rc>RC_MSS_INVALID_FREQUENCY</rc>
- <description>
- An invalid frequency was passed to frequency to clock period
- </description>
- <ffdc>FREQ</ffdc>
- <callout>
- <procedure>CODE</procedure>
- <priority>HIGH</priority>
- </callout>
-</hwpError>
+ <hwpError>
+ <rc>RC_MSS_INVALID_DB_MDQ_DRIVE_STRENGTH</rc>
+ <description>
+ Bad SPD data for bytes 145 - 147.
+ Reserved settings for data buffer MDQ drive strength received.
+ This could be code problem (decoding) or bad SPD.
+ </description>
+ <ffdc>DATA_RATE</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ <callout>
+ <target>TARGET</target>
+ <priority>HIGH</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET</target>
+ </deconfigure>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_INVALID_DIMM_SPEED</rc>
+ <description>
+ Invalid DIMM speed received. Possibly a programming error.
+ </description>
+ <ffdc>DIMM_SPEED</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ <callout>
+ <target>TARGET</target>
+ <priority>HIGH</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET</target>
+ </deconfigure>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_INVALID_DIMM_TYPE</rc>
+ <description>
+ Received a DIMM type unsupported by the SPD decoder factory
+ </description>
+ <ffdc>DIMM_TYPE</ffdc>
+ <ffdc>FUNCTION</ffdc>
+ <callout>
+ <procedure>MEMORY_PLUGGING_ERROR</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ <callout>
+ <target>DIMM_TARGET</target>
+ <priority>LOW</priority>
+ </callout>
+ <deconfigure>
+ <target>DIMM_TARGET</target>
+ </deconfigure>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_INVALID_DRAM_GEN</rc>
+ <description>
+ Received a DRAM gen unsupported by the SPD decoder factory
+ </description>
+ <ffdc>DRAM_GEN</ffdc>
+ <ffdc>FUNCTION</ffdc>
+ <callout>
+ <procedure>MEMORY_PLUGGING_ERROR</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ <callout>
+ <target>DIMM_TARGET</target>
+ <priority>LOW</priority>
+ </callout>
+ <deconfigure>
+ <target>DIMM_TARGET</target>
+ </deconfigure>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_INVALID_FREQUENCY</rc>
+ <description>
+ An invalid frequency was passed to frequency to clock period
+ </description>
+ <ffdc>FREQ</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_INVALID_FREQ_LIST_PASSED</rc>
+ <description>
+ Wrong size vector passed into frequency scoreboard function
+ </description>
+ <ffdc>SIZE</ffdc>
+ <ffdc>EXPECTED</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_INVALID_HYBRID_MODULE</rc>
+ <description>
+ Received an invalid or unsupported hybrid media (SPD byte 3, bits [6:4])
+ for a specified hybrid modue (SPD byte 3, bit [7])
+ </description>
+ <ffdc>HYBRID</ffdc>
+ <ffdc>HYBRID_MEDIA</ffdc>
+ <ffdc>FUNCTION</ffdc>
+ <callout>
+ <procedure>MEMORY_PLUGGING_ERROR</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ <callout>
+ <target>TARGET</target>
+ <priority>LOW</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET</target>
+ </deconfigure>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ </hwpError>
<hwpError>
<rc>RC_MSS_INVALID_PORT_INDEX_PASSED</rc>
@@ -254,6 +425,47 @@
</hwpError>
<hwpError>
+ <rc>RC_MSS_INVALID_SPD_PARAMETER_RECEIVED</rc>
+ <description>
+ Unable to fall back SPD decoder to the highest decoded
+ revision. Most likely a programming error.
+ </description>
+ <ffdc>SPD_PARAM</ffdc>
+ <ffdc>FUNCTION_CODE</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ <callout>
+ <target>TARGET</target>
+ <priority>MEDIUM</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET</target>
+ </deconfigure>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_INVALID_SPD_RESERVED_BITS</rc>
+ <description>
+ Invalid SPD reserved bits received.
+ This could be code problem (decoding) or bad SPD.
+ </description>
+ <ffdc>FUNCTION_CODE</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ <callout>
+ <target>TARGET</target>
+ <priority>HIGH</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET</target>
+ </deconfigure>
+ </hwpError>
+
+ <hwpError>
<rc>RC_MSS_INVALID_TIMING_VALUE</rc>
<description>Invalid value calculated for timing value based on MTB and FTB from SPD.</description>
<ffdc>VALUE</ffdc>
@@ -270,6 +482,36 @@
</gard>
</hwpError>
+ <hwpError>
+ <rc>RC_MSS_INVALID_VPD_FREQ_LIST_PASSED</rc>
+ <description>
+ Wrong size vector passed into limit_freq_by_vpd function
+ </description>
+ <ffdc>SIZE</ffdc>
+ <ffdc>EXPECTED</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_INVALID_VPD_KEYWORD_MAX</rc>
+ <description>
+ VPD keyword is too big for space allocated for it.
+ </description>
+ <ffdc>MAX</ffdc>
+ <ffdc>ACTUAL</ffdc>
+ <ffdc>KEYWORD</ffdc>
+ <callout>
+ <hw>
+ <hwid>VPD_PART</hwid>
+ <refTarget>VPD_TARGET</refTarget>
+ </hw>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
<hwpError>
<rc>RC_MSS_LOOKUP_FAILED</rc>
<description>
@@ -288,6 +530,16 @@
</hwpError>
<hwpError>
+ <rc>RC_MSS_MEMDIAGS_NO_MCBIST_SUBTESTS</rc>
+ <description>Attempt to run an MCBIST program with no subtests</description>
+ <ffdc>MC_TARGET</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
<rc>RC_MSS_VOLT_WRONG_NUMBER_OF_VOLTAGES</rc>
<description>Incorrect number of voltages supplied to set_voltage_attributes function</description>
<ffdc>VOLT_TARGET</ffdc>
@@ -543,6 +795,21 @@
</callout>
</hwpError>
+ <hwpError>
+ <rc>RC_MSS_MAX_FREQ_ATTR_SIZE_CHANGED</rc>
+ <description>
+ Number of entries for MSS_MRW_MAX_FREQ attribute from VPD has changed without updating the code
+ Asserted because direct accesses to array
+ </description>
+ <ffdc>ACTUAL_SIZE</ffdc>
+ <ffdc>SUPPOSED_SIZE</ffdc>
+ <ffdc>PORT_TARGET</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
<hwpError>
<rc>RC_MSS_CALC_PORT_POWER_EXCEEDS_MAX</rc>
<description>
@@ -570,6 +837,66 @@
</deconfigure>
</hwpError>
+ <hwpError>
+ <rc>RC_MSS_SPD_REV_ENCODING_LEVEL_NOT_SUPPORTED</rc>
+ <description>
+ SPD revision on byte 1 (bits 7~4) has a unsupported encoding level
+ that is greater than the largest decoded SPD decoder. There is
+ no backward compatible revision to fallback to. This could be
+ bad SPD or a programming error.
+ </description>
+ <ffdc>ENCODING_LEVEL</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ <callout>
+ <target>TARGET</target>
+ <priority>MEDIUM</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET</target>
+ </deconfigure>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_SPD_TIMING_FAIL</rc>
+ <description>
+ Timing SPD parameter failed to meet JEDEC SPD timing
+ bounds. FUNCTION_CODE ffdc field encodes which timing param.
+ </description>
+ <ffdc>FAILED_REVISION</ffdc>
+ <ffdc>FUNCTION_CODE</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>MEDIUM</priority>
+ </callout>
+ <callout>
+ <target>TARGET</target>
+ <priority>MEDIUM</priority>
+ </callout>
+ <deconfigure>
+ <target>TARGET</target>
+ </deconfigure>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_TOO_MANY_DIMMS_ON_PORT</rc>
+ <description>There seem to be too many dimms on the port</description>
+ <ffdc>DIMM_COUNT</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ <callout>
+ <childTargets>
+ <parent>PORT_TARGET</parent>
+ <childType>TARGET_TYPE_DIMM</childType>
+ </childTargets>
+ <priority>MEDIUM</priority>
+ </callout>
+ </hwpError>
+
<hwpError>
<rc>RC_MSS_SLOT_UTIL_EXCEEDS_PORT</rc>
<description>
OpenPOWER on IntegriCloud