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author | Mark Pizzutillo <Mark.Pizzutillo@ibm.com> | 2019-06-06 12:25:48 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-06-24 23:11:46 -0500 |
commit | ca414b982877404df7528f9449d4b6690dab3f6b (patch) | |
tree | 5971c55e71cd96815695efc3a5cb309288c36586 /src/import/generic/procedures | |
parent | 5ef6025f21421230801cc58d64304a2ed9b8d8a5 (diff) | |
download | talos-hostboot-ca414b982877404df7528f9449d4b6690dab3f6b.tar.gz talos-hostboot-ca414b982877404df7528f9449d4b6690dab3f6b.zip |
Fix exp_draminit phy_params
Change-Id: I624caa1310920daf172d6681e7c760442236070f
git-coreq:hostboot:I624caa1310920daf172d6681e7c760442236070f
CMVC-Coreq: 1086224
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78469
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78516
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/generic/procedures')
-rw-r--r-- | src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml | 15 | ||||
-rw-r--r-- | src/import/generic/procedures/xml/attribute_info/generic_memory_si_attributes.xml | 31 |
2 files changed, 16 insertions, 30 deletions
diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml index 8e7b12bbf..3167e018a 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml @@ -187,6 +187,7 @@ </description> <initToZero></initToZero> <valueType>uint8</valueType> + <enum> NUM10 = 10</enum> <writeable/> <array>2</array> <mssAccessorName>dram_column_bits</mssAccessorName> @@ -588,6 +589,20 @@ <mssAccessorName>logical_ranks_per_dimm</mssAccessorName> </attribute> + <attribute> + <id>ATTR_MEM_3DS_HEIGHT</id> + <targetType>TARGET_TYPE_MEM_PORT</targetType> + <description> + Setting for 3DS stack. Calculated from logical_ranks / master_ranks + </description> + <initToZero></initToZero> + <valueType>uint16</valueType> + <enum>PLANAR = 0, H2 = 2, H4 = 4, H8 = 8</enum> + <array>2</array> + <writeable/> + <mssAccessorName>3ds_height</mssAccessorName> + </attribute> + <attribute> <id>ATTR_MEM_EFF_REGISTER_TYPE</id> <targetType>TARGET_TYPE_MEM_PORT</targetType> diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_si_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_si_attributes.xml index 1ec910f04..d8410a5a0 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_si_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_si_attributes.xml @@ -106,7 +106,7 @@ <initToZero></initToZero> <valueType>uint8</valueType> <writeable/> - <enum>OHM34 = 34, OHM48 = 48</enum> + <enum>DISABLE = 0, OHM34 = 34, OHM48 = 48</enum> <mssUnits>ohm</mssUnits> <mssAccessorName>si_dram_drv_imp_dq_dqs</mssAccessorName> <array>2 4</array> @@ -179,35 +179,6 @@ </attribute> <attribute> - <id>ATTR_MEM_SI_VREF_DQ_TRAIN_VALUE</id> - <targetType>TARGET_TYPE_MEM_PORT</targetType> - <description> - ARRAY[DIMM][RANK] - vrefdq_train value. This is for DDR4 MRS6. - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <writeable/> - <array>2 4</array> - <mssAccessorName>si_vref_dq_train_value</mssAccessorName> - </attribute> - - <attribute> - <id>ATTR_MEM_SI_VREF_DQ_TRAIN_RANGE</id> - <targetType>TARGET_TYPE_MEM_PORT</targetType> - <description> - ARRAY[DIMM][RANK] - vrefdq_train range. This is for DDR4 MRS6. - </description> - <initToZero></initToZero> - <valueType>uint8</valueType> - <enum>RANGE1 = 0, RANGE2 = 1</enum> - <writeable/> - <array>2 4</array> - <mssAccessorName>si_vref_dq_train_range</mssAccessorName> - </attribute> - - <attribute> <id>ATTR_MEM_SI_GEARDOWN_MODE</id> <targetType>TARGET_TYPE_MEM_PORT</targetType> <description> |