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author | Andre A. Marin <aamarin@us.ibm.com> | 2019-04-15 14:41:46 -0500 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-04-25 12:39:26 -0500 |
commit | 508ddc960ec66dd9d6b312eb699589f3431dad1d (patch) | |
tree | f71c402b6715705fa224cfc483a9560bf20ebf17 /src/import/generic/procedures | |
parent | 357441ef8b732b8f2b0a697d2ae7c368b3646649 (diff) | |
download | talos-hostboot-508ddc960ec66dd9d6b312eb699589f3431dad1d.tar.gz talos-hostboot-508ddc960ec66dd9d6b312eb699589f3431dad1d.zip |
Add mem_size and misc attrs, unit tests enable
Consulting w/PRD (Zane), ATTR_EFF_DIMM_RANK_CONFIGED
is not required to be initialized early in the ipl flow.
So we move it from pre_eff_config to eff_config.
Added attr_derived_engine to set attrs derived
from other attrs or hardcodes. Updated unit tests.
Added attrs not set in exp_draminit implementation of
eff_config
Change-Id: I0bb5e1913160d2cd0224cbb8566b7548eabe46d4
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75440
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75575
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/generic/procedures')
-rw-r--r-- | src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml | 49 |
1 files changed, 46 insertions, 3 deletions
diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml index 8890a447b..1b2e69ea4 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_eff_attributes.xml @@ -212,11 +212,36 @@ </attribute> <attribute> + <id>ATTR_MEM_EFF_PRIM_DIE_COUNT</id> + <targetType>TARGET_TYPE_MEM_PORT</targetType> + <description> + ARRAY[DIMM] + Primary SDRAM Die Count. + Decodes Byte 6 (bits 6~4). + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <enum> + D1 = 1, + D2 = 2, + D3 = 3, + D4 = 4, + D5 = 5, + D6 = 6, + D7 = 7, + D8 = 8 + </enum> + <writeable/> + <array>2</array> + <mssAccessorName>prim_die_count</mssAccessorName> + </attribute> + + <attribute> <id>ATTR_MEM_EFF_PRIM_STACK_TYPE</id> <targetType>TARGET_TYPE_MEM_PORT</targetType> <description> ARRAY[DIMM] - Primary SDRAM Package Type. + Primary SDRAM Package Type (bits 1~0). Decodes Byte 6. This byte defines the primary set of SDRAMs. Monolithic = SPD, Multi-load stack = DDP/QDP, Single-load stack = 3DS @@ -230,6 +255,24 @@ </attribute> <attribute> + <id>ATTR_MEM_EFF_PRIM_BUS_WIDTH</id> + <targetType>TARGET_TYPE_MEM_PORT</targetType> + <description> + ARRAY[DIMM] + Primary bus with (bits 1~0). + Decodes Byte 13. + </description> + <initToZero></initToZero> + <valueType>uint8</valueType> + <enum> + 8_BITS = 8, 16_BITS = 16, 32_BITS = 32, 64_BITS = 64 + </enum> + <writeable/> + <array>2</array> + <mssAccessorName>prim_bus_width</mssAccessorName> + </attribute> + + <attribute> <id>ATTR_MEM_EFF_DRAM_PPR</id> <targetType>TARGET_TYPE_MEM_PORT</targetType> <description> @@ -522,7 +565,7 @@ </attribute> <attribute> - <id>ATTR_MEM_EFF_NUM_RANKS_PER_DIMM</id> + <id>ATTR_MEM_EFF_LOGICAL_RANKS_PER_DIMM</id> <targetType>TARGET_TYPE_MEM_PORT</targetType> <description> ARRAY[DIMM] @@ -542,7 +585,7 @@ </enum> <writeable/> <array>2</array> - <mssAccessorName>num_ranks_per_dimm</mssAccessorName> + <mssAccessorName>logical_ranks_per_dimm</mssAccessorName> </attribute> <attribute> |