diff options
| author | Andre Marin <aamarin@us.ibm.com> | 2018-02-21 10:16:11 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-03-08 21:54:35 -0500 |
| commit | 3ffad4a090112aacc7d3d42cff86534946776ae8 (patch) | |
| tree | 8f64efa210f111747429a969c5f3b80edae80428 /src/import/generic/memory/lib/spd | |
| parent | 968b1746f9e7564cdd1e9da0cb8faf802600cb80 (diff) | |
| download | talos-hostboot-3ffad4a090112aacc7d3d42cff86534946776ae8.tar.gz talos-hostboot-3ffad4a090112aacc7d3d42cff86534946776ae8.zip | |
Remove mss::c_str dependency for SPD decoder for future reuse
mss::c_str is attribute dependent on p9 nimbus attributes.
In order to reuse this decoder going forward (Cumulus, Axone, etc)
we need to remove this dependency by using fapi2::toString as an
alternative for trace printouts. Updated SPD folder backup.
Change-Id: I7b3f6e2fe2351519760c2fe54c66967052706671
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54550
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54958
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/generic/memory/lib/spd')
17 files changed, 303 insertions, 290 deletions
diff --git a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H index 7ec95e040..e7fee6e6d 100644 --- a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H +++ b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief SPD decoder declarations /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -1529,7 +1529,7 @@ class decoder_v1_0 : public decoder l_buffer.extractToRight<TT::EXTRACT_START, TT::EXTRACT_LEN>(l_field); FAPI_DBG("%s SPD byte %d, data: %d, field value: %d, starting bit: %d, bit length: %d", - mss::c_str(iv_target), byte, iv_spd_data[byte], l_field, TT::EXTRACT_START, TT::EXTRACT_LEN); + iv_target_str_storage, byte, iv_spd_data[byte], l_field, TT::EXTRACT_START, TT::EXTRACT_LEN); FAPI_TRY( TT::fail_check(iv_target, byte, l_field) ); diff --git a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4_v1_0.C b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4_v1_0.C index 3c25e3530..fa47e5384 100644 --- a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4_v1_0.C +++ b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4_v1_0.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,7 +27,7 @@ /// @brief SPD decoder definitions /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -117,7 +117,7 @@ fapi2::ReturnCode decoder_v1_0::number_of_used_bytes( uint16_t& o_value ) const "Failed check on SPD used bytes") ); FAPI_INF("%s. Bytes Used: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -164,7 +164,7 @@ fapi2::ReturnCode decoder_v1_0::number_of_total_bytes( uint16_t& o_value ) const "Failed check on SPD total bytes") ); FAPI_INF("%s. Total Bytes: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -214,7 +214,7 @@ fapi2::ReturnCode decoder_v1_0::sdram_density( uint8_t& o_value) const "Failed check for SPD DRAM capacity") ); FAPI_INF("%s. SDRAM density: %d Gb", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -261,7 +261,7 @@ fapi2::ReturnCode decoder_v1_0::bank_bits( uint8_t& o_value) const "Failed check for SPD DRAM banks") ); FAPI_INF("%s. Number of banks address bits: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -308,7 +308,7 @@ fapi2::ReturnCode decoder_v1_0::bank_group_bits( uint8_t& o_value) const "Failed check for SPD DRAM bank groups") ); FAPI_INF("%s. Number of bank group bits: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -356,7 +356,7 @@ fapi2::ReturnCode decoder_v1_0::column_address_bits( uint8_t& o_value) const "Failed check for SDRAM Column Address Bits") ); FAPI_INF("%s. Number of Column Address Bits: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -407,7 +407,7 @@ fapi2::ReturnCode decoder_v1_0::row_address_bits( uint8_t& o_value) const "Failed check for SDRAM Row Address Bits") ); FAPI_INF("%s. Number of Row Address Bits: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -455,7 +455,7 @@ fapi2::ReturnCode decoder_v1_0::prim_sdram_signal_loading( uint8_t& o_value) con "Failed check for Primary SDRAM Signal Loading") ); FAPI_INF("%s. Primary SDRAM Signal Loading: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -507,7 +507,7 @@ fapi2::ReturnCode decoder_v1_0::prim_sdram_die_count( uint8_t& o_value) const "Failed check for SDRAM Row Address Bits") ); FAPI_INF("%s. Number of Row Address Bits: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -553,7 +553,7 @@ fapi2::ReturnCode decoder_v1_0::prim_sdram_package_type( uint8_t& o_value) const "Failed check for Primary SDRAM package type") ); FAPI_INF("%s. Primary SDRAM package type: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -606,7 +606,7 @@ fapi2::ReturnCode decoder_v1_0::maximum_activate_count( uint32_t& o_value ) cons "Failed check for SDRAM Maximum Active Count (MAC)") ); FAPI_INF("%s. Maximum Active Count (MAC): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -654,7 +654,7 @@ fapi2::ReturnCode decoder_v1_0::maximum_activate_window_multiplier( uint32_t& o_ "Failed check for Maximum Active Window (tMAW)") ); FAPI_INF("%s. Maximum Active Window multiplier: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -700,7 +700,7 @@ fapi2::ReturnCode decoder_v1_0::post_package_repair( uint8_t& o_value) const "Failed check for PPR") ); FAPI_INF("%s. Post Package Repair (PPR): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -845,7 +845,7 @@ fapi2::ReturnCode decoder_v1_0::operable_nominal_voltage( uint8_t& o_value) cons "Failed check for Operable nominal voltage") ); FAPI_INF("%s. Operable: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -892,7 +892,7 @@ fapi2::ReturnCode decoder_v1_0::endurant_nominal_voltage( uint8_t& o_value) cons "Failed check for Endurant nominal voltage") ); FAPI_INF("%s. Endurant: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -941,7 +941,7 @@ fapi2::ReturnCode decoder_v1_0::device_width( uint8_t& o_value) const "Failed check for Device Width") ); FAPI_INF("%s. Device Width: %d bits", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -991,7 +991,7 @@ fapi2::ReturnCode decoder_v1_0::num_package_ranks_per_dimm( uint8_t& o_value) co "Failed check for Num Package Ranks Per DIMM") ); FAPI_INF("%s. Num Package Ranks per DIMM: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1060,7 +1060,7 @@ fapi2::ReturnCode decoder_v1_0::prim_bus_width( uint8_t& o_value) const "Failed check for Primary Bus Width") ); FAPI_INF("%s. Primary Bus Width: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1106,7 +1106,7 @@ fapi2::ReturnCode decoder_v1_0::bus_width_extension( uint8_t& o_value) const "Failed check for Bus Width Extension") ); FAPI_INF("%s. Bus Width Extension (bits): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1141,7 +1141,7 @@ fapi2::ReturnCode decoder_v1_0::thermal_sensor( uint8_t& o_value) const o_value = l_field_bits; FAPI_INF("%s. Thermal Sensor: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1176,7 +1176,7 @@ fapi2::ReturnCode decoder_v1_0::extended_base_module_type( uint8_t& o_value) con o_value = l_field_bits; FAPI_INF("%s. Extended Base Module Type: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1224,7 +1224,7 @@ fapi2::ReturnCode decoder_v1_0::fine_timebase( int64_t& o_value) const "Failed check for Fine Timebase") ); FAPI_INF("%s. Fine Timebase: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1271,7 +1271,7 @@ fapi2::ReturnCode decoder_v1_0::medium_timebase( int64_t& o_value) const "Failed check for Medium Timebase") ); FAPI_INF("%s. Medium Timebase: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1300,7 +1300,7 @@ fapi2::ReturnCode decoder_v1_0::min_tck( int64_t& o_value ) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: %d.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_timing_val); @@ -1319,7 +1319,7 @@ fapi2::ReturnCode decoder_v1_0::min_tck( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Minimum Cycle Time (tCKmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1347,7 +1347,7 @@ fapi2::ReturnCode decoder_v1_0::max_tck( int64_t& o_value ) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: %d.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_timing_val); @@ -1366,7 +1366,7 @@ fapi2::ReturnCode decoder_v1_0::max_tck( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Maximum Cycle Time (tCKmax) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1389,28 +1389,28 @@ fapi2::ReturnCode decoder_v1_0::supported_cas_latencies( uint64_t& o_value ) con constexpr size_t FIRST_BYTE = 20; uint8_t first_raw_byte = iv_spd_data[FIRST_BYTE]; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, FIRST_BYTE, first_raw_byte); constexpr size_t SEC_BYTE = 21; uint8_t sec_raw_byte = iv_spd_data[SEC_BYTE]; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, SEC_BYTE, sec_raw_byte); constexpr size_t THIRD_BYTE = 22; uint8_t third_raw_byte = iv_spd_data[THIRD_BYTE]; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, THIRD_BYTE, third_raw_byte); constexpr size_t FOURTH_BYTE = 23; uint8_t fourth_raw_byte = iv_spd_data[FOURTH_BYTE]; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, FOURTH_BYTE, fourth_raw_byte); @@ -1439,7 +1439,7 @@ fapi2::ReturnCode decoder_v1_0::supported_cas_latencies( uint64_t& o_value ) con o_value = l_supported_cl; FAPI_INF("%s. CAS latencies supported (bitmap): 0x%llX", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1468,7 +1468,7 @@ fapi2::ReturnCode decoder_v1_0::min_taa( int64_t& o_value ) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_timing_val); @@ -1487,7 +1487,7 @@ fapi2::ReturnCode decoder_v1_0::min_taa( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Minimum CAS Latency Time (tAAmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1515,7 +1515,7 @@ fapi2::ReturnCode decoder_v1_0::min_trcd( int64_t& o_value ) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_timing_val); @@ -1534,7 +1534,7 @@ fapi2::ReturnCode decoder_v1_0::min_trcd( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Minimum RAS to CAS Delay Time (tRCDmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1562,7 +1562,7 @@ fapi2::ReturnCode decoder_v1_0::min_trp( int64_t& o_value ) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_timing_val); @@ -1581,7 +1581,7 @@ fapi2::ReturnCode decoder_v1_0::min_trp( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Minimum Row Precharge Delay Time (tRPmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1640,7 +1640,7 @@ fapi2::ReturnCode decoder_v1_0::min_tras( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum Active to Precharge Delay Time (tRASmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1702,7 +1702,7 @@ fapi2::ReturnCode decoder_v1_0::min_trc( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum Active to Active/Refresh Delay Time (tRCmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1761,7 +1761,7 @@ fapi2::ReturnCode decoder_v1_0::min_trfc1( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum Refresh Recovery Delay Time 1 (tRFC1min) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1819,7 +1819,7 @@ fapi2::ReturnCode decoder_v1_0::min_trfc2( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum Refresh Recovery Delay Time 2 (tRFC2min) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1877,7 +1877,7 @@ fapi2::ReturnCode decoder_v1_0::min_trfc4( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum Refresh Recovery Delay Time 4 (tRFC4min) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1935,7 +1935,7 @@ fapi2::ReturnCode decoder_v1_0::min_tfaw( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum Four Activate Window Delay Time (tFAWmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -1961,7 +1961,7 @@ fapi2::ReturnCode decoder_v1_0::min_trrd_s( int64_t& o_value) const constexpr size_t BYTE_INDEX = 38; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -1984,7 +1984,7 @@ fapi2::ReturnCode decoder_v1_0::min_trrd_s( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum Activate to Activate Delay Time - Different Bank Group (tRRD_Smin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2010,7 +2010,7 @@ fapi2::ReturnCode decoder_v1_0::min_trrd_l( int64_t& o_value) const constexpr size_t BYTE_INDEX = 39; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2033,7 +2033,7 @@ fapi2::ReturnCode decoder_v1_0::min_trrd_l( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum Activate to Activate Delay Time - Same Bank Group (tRRD_Lmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2059,7 +2059,7 @@ fapi2::ReturnCode decoder_v1_0::min_tccd_l( int64_t& o_value) const constexpr size_t BYTE_INDEX = 40; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2082,7 +2082,7 @@ fapi2::ReturnCode decoder_v1_0::min_tccd_l( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Minimum CAS to CAS Delay Time - Same Bank Group (tCCD_Lmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2168,13 +2168,13 @@ fapi2::ReturnCode decoder_v1_0::package_rank_map( std::vector<uint8_t>& o_value o_value.clear(); FAPI_TRY( (sdram_connector_helper<DQ0_31, PKG_RANK_MAP>(o_value)), - "%s Failed to sdram_connector_helper for DQ0_31, PKG_RANK_MAP", mss::c_str(iv_target) ); + "%s Failed to sdram_connector_helper for DQ0_31, PKG_RANK_MAP", iv_target_str_storage ); FAPI_TRY( (sdram_connector_helper<DQ32_63, PKG_RANK_MAP>(o_value)), - "%s Failed to sdram_connector_helper for DQ32_63, PKG_RANK_MAP", mss::c_str(iv_target) ); + "%s Failed to sdram_connector_helper for DQ32_63, PKG_RANK_MAP", iv_target_str_storage ); FAPI_TRY( (sdram_connector_helper<CB0_7, PKG_RANK_MAP>(o_value)), - "%s Failed to sdram_connector_helper for CB0_7, PKG_RANK_MAP", mss::c_str(iv_target) ); + "%s Failed to sdram_connector_helper for CB0_7, PKG_RANK_MAP", iv_target_str_storage ); fapi_try_exit: return fapi2::current_err; @@ -2194,13 +2194,13 @@ fapi2::ReturnCode decoder_v1_0::nibble_map( std::vector<uint8_t>& o_value ) cons o_value.clear(); FAPI_TRY( (sdram_connector_helper<DQ0_31, NIBBLE_MAP>(o_value)), - "%s Failed to sdram_connector_helper for DQ0_31, NIBBLE_MAP", mss::c_str(iv_target) ); + "%s Failed to sdram_connector_helper for DQ0_31, NIBBLE_MAP", iv_target_str_storage ); FAPI_TRY( (sdram_connector_helper<DQ32_63, NIBBLE_MAP>(o_value)), - "%s Failed to sdram_connector_helper for DQ32_63, NIBBLE_MAP", mss::c_str(iv_target) ); + "%s Failed to sdram_connector_helper for DQ32_63, NIBBLE_MAP", iv_target_str_storage ); FAPI_TRY( (sdram_connector_helper<CB0_7, NIBBLE_MAP>(o_value)), - "%s Failed to sdram_connector_helper for CB0_7, NIBBLE_MAP", mss::c_str(iv_target) ); + "%s Failed to sdram_connector_helper for CB0_7, NIBBLE_MAP", iv_target_str_storage ); fapi_try_exit: return fapi2::current_err; @@ -2221,7 +2221,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_tccd_l( int64_t& o_value) const constexpr size_t BYTE_INDEX = 117; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2245,7 +2245,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_tccd_l( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Minimum RAS to CAS Delay Time (tCCD_Lmin) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2267,7 +2267,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trrd_l( int64_t& o_value) const constexpr size_t BYTE_INDEX = 118; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2291,7 +2291,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trrd_l( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Minimum Activate to Activate Delay Time (tRRD_Lmin) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2313,7 +2313,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trrd_s( int64_t& o_value) const constexpr size_t BYTE_INDEX = 119; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2337,7 +2337,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trrd_s( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Minimum Activate to Activate Delay Time - Different Bank Group (tRRD_Smin) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2359,7 +2359,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trc( int64_t& o_value) const constexpr size_t BYTE_INDEX = 120; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2383,7 +2383,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trc( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Minimum Active to Active/Refresh Delay Time (tRCmin) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2405,7 +2405,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trp( int64_t& o_value) const constexpr size_t BYTE_INDEX = 121; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2429,7 +2429,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trp( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Minimum Row Precharge Delay Time (tRPmin) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2450,7 +2450,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trcd( int64_t& o_value) const constexpr size_t BYTE_INDEX = 122; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2474,7 +2474,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_trcd( int64_t& o_value) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Minimum RAS to CAS Delay Time (tRCDmin) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2496,7 +2496,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_taa( int64_t& o_value ) const constexpr size_t BYTE_INDEX = 123; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2520,7 +2520,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_taa( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Minimum CAS Latency Time (tAAmin) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2542,7 +2542,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_max_tck( int64_t& o_value ) const constexpr size_t BYTE_INDEX = 124; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2566,7 +2566,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_max_tck( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Maximum Cycle Time (tCKmax) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2589,7 +2589,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_tck( int64_t& o_value ) const constexpr size_t BYTE_INDEX = 125; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); @@ -2613,7 +2613,7 @@ fapi2::ReturnCode decoder_v1_0::fine_offset_min_tck( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Fine offset for Minimum Cycle Time (tCKmin) in FTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -2652,7 +2652,7 @@ fapi2::ReturnCode decoder_v1_0::cyclical_redundancy_code( uint16_t& o_value ) co o_value = l_buffer; FAPI_INF("%s. Cyclical Redundancy Code (CRC): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); // Returns "happy" until we can figure out a way to test this - AAM @@ -2689,7 +2689,7 @@ fapi2::ReturnCode decoder_v1_0::module_manufacturer_id_code( uint16_t& o_value ) o_value = l_buffer; FAPI_INF("%s.Module Manufacturer ID Code: %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); // Returns "happy" until we can figure out a way to test this - AAM @@ -2711,14 +2711,14 @@ fapi2::ReturnCode decoder_v1_0::module_manufacturing_location( uint8_t& o_value) constexpr size_t BYTE_INDEX = 322; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); o_value = iv_spd_data[BYTE_INDEX]; FAPI_INF("%s. Module Manufacturing Location: %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); return fapi2::FAPI2_RC_SUCCESS; @@ -2757,7 +2757,7 @@ fapi2::ReturnCode decoder_v1_0::module_manufacturing_date( uint16_t& o_value ) c o_value = l_buffer; FAPI_INF("%s.Module Manufacturer ID date: %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); // Returns "happy" until we can figure out a way to test this - AAM @@ -2807,7 +2807,7 @@ fapi2::ReturnCode decoder_v1_0::module_serial_number( uint32_t& o_value ) const o_value = l_buffer; FAPI_INF("%s.Module Serial Number : %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); // Returns "happy" until we can figure out a way to test this - AAM @@ -2829,14 +2829,14 @@ fapi2::ReturnCode decoder_v1_0::module_revision_code( uint8_t& o_value) const constexpr size_t BYTE_INDEX = 349; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); o_value = iv_spd_data[BYTE_INDEX]; FAPI_INF("%s. Module Revision Code: %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); return fapi2::FAPI2_RC_SUCCESS; @@ -2871,7 +2871,7 @@ fapi2::ReturnCode decoder_v1_0::dram_manufacturer_id_code( uint16_t& o_value ) c o_value = l_buffer; FAPI_INF("%s.DRAM Manufacturer ID Code (dram_mfg_id): %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); // Returns "happy" until we can figure out a way to test this - AAM @@ -2907,7 +2907,7 @@ fapi2::ReturnCode decoder_v1_0::reg_manufacturer_id_code( uint16_t& o_value ) co o_value = l_buffer; FAPI_INF("%s.RCD Manufacturer ID Code (rcd_mfg_id): %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); return fapi2::FAPI2_RC_SUCCESS; @@ -2928,14 +2928,14 @@ fapi2::ReturnCode decoder_v1_0::register_rev_num( uint8_t& o_value ) const constexpr size_t BYTE_INDEX = 135; FAPI_INF("%s SPD data at Byte %d: 0x%01X.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); o_value = iv_spd_data[BYTE_INDEX]; FAPI_INF("%s. Register Revision Number: %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); return fapi2::FAPI2_RC_SUCCESS; @@ -2957,14 +2957,14 @@ fapi2::ReturnCode decoder_v1_0::dram_stepping( uint8_t& o_value) const constexpr size_t BYTE_INDEX = 352; FAPI_INF("%s SPD data at Byte %d: 0x%01X.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, iv_spd_data[BYTE_INDEX]); o_value = iv_spd_data[BYTE_INDEX]; FAPI_INF("%s. DRAM stepping: %x", - mss::c_str(iv_target), + iv_target_str_storage, o_value); return fapi2::FAPI2_RC_SUCCESS; } diff --git a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4_v1_1.C b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4_v1_1.C index 76ec727c9..ca08de944 100644 --- a/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4_v1_1.C +++ b/src/import/generic/memory/lib/spd/common/ddr4/spd_decoder_ddr4_v1_1.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,7 +27,7 @@ /// @brief SPD decoder definitions /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -115,7 +115,7 @@ fapi2::ReturnCode decoder_v1_1::sdram_density( uint8_t& o_value ) const "Failed check for SPD DRAM capacity") ); FAPI_INF("%s. SDRAM density: %d Gb", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -162,7 +162,7 @@ fapi2::ReturnCode decoder_v1_1::sec_sdram_signal_loading( uint8_t& o_value ) con "Failed check for Secondary SDRAM Signal Loading") ); FAPI_INF("%s. Secondary SDRAM Signal Loading: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -208,7 +208,7 @@ fapi2::ReturnCode decoder_v1_1::soft_post_package_repair( uint8_t& o_value ) con "Failed check for Soft PPR") ); FAPI_INF("%s. Soft Post Package Repair (Soft PPR): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -240,7 +240,7 @@ fapi2::ReturnCode decoder_v1_1::sec_dram_density_ratio( uint8_t& o_value ) const "Failed check for DRAM Density Ratio") ); FAPI_INF("%s. DRAM Density Ratio: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -294,7 +294,7 @@ fapi2::ReturnCode decoder_v1_1::sec_sdram_die_count( uint8_t& o_value ) const "Failed check for Secondary Die Count") ); FAPI_INF("%s. Secondary Die Count: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -341,7 +341,7 @@ fapi2::ReturnCode decoder_v1_1::sec_sdram_package_type( uint8_t& o_value ) const "Failed check for Secondary Package Type") ); FAPI_INF("%s. Secondary Package Type: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -393,7 +393,7 @@ fapi2::ReturnCode decoder_v1_1::num_package_ranks_per_dimm( uint8_t& o_value ) c "Failed check for Num Package Ranks Per DIMM") ); FAPI_INF("%s. Num Package Ranks per DIMM: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -428,7 +428,7 @@ fapi2::ReturnCode decoder_v1_1::rank_mix( uint8_t& o_value ) const o_value = l_field_bits; FAPI_INF("%s. Rank Mix: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -450,28 +450,28 @@ fapi2::ReturnCode decoder_v1_1::supported_cas_latencies( uint64_t& o_value ) con constexpr size_t FIRST_BYTE = 20; uint8_t first_raw_byte = iv_spd_data[FIRST_BYTE]; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - c_str(iv_target), + iv_target_str_storage, FIRST_BYTE, first_raw_byte); constexpr size_t SEC_BYTE = 21; uint8_t sec_raw_byte = iv_spd_data[SEC_BYTE]; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - c_str(iv_target), + iv_target_str_storage, SEC_BYTE, sec_raw_byte); constexpr size_t THIRD_BYTE = 22; uint8_t third_raw_byte = iv_spd_data[THIRD_BYTE]; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - c_str(iv_target), + iv_target_str_storage, THIRD_BYTE, third_raw_byte); constexpr size_t FOURTH_BYTE = 23; uint8_t fourth_raw_byte = iv_spd_data[FOURTH_BYTE]; FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - c_str(iv_target), + iv_target_str_storage, FOURTH_BYTE, fourth_raw_byte); @@ -501,7 +501,7 @@ fapi2::ReturnCode decoder_v1_1::supported_cas_latencies( uint64_t& o_value ) con o_value = l_buffer; FAPI_INF("%s. CAS latencies supported (bitmap): 0x%llX", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -561,7 +561,7 @@ fapi2::ReturnCode decoder_v1_1::min_twr( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Minimum Write Recovery Time (tWRmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -623,7 +623,7 @@ fapi2::ReturnCode decoder_v1_1::min_twtr_s( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Minimum Write to Read Time - Different Bank Group (tWTR_Smin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: @@ -684,7 +684,7 @@ fapi2::ReturnCode decoder_v1_1::min_twtr_l( int64_t& o_value ) const o_value = l_timing_val; FAPI_INF("%s. Minimum Write to Read Time - Same Bank Group (tWTR_Lmin) in MTB units: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_value); fapi_try_exit: diff --git a/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H b/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H index 67f1b9a23..da24f3155 100644 --- a/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H +++ b/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief base dimm module SPD decoder declarations /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -53,6 +53,10 @@ namespace spd class dimm_module_decoder { public: + const fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_target; + + // + std::vector<uint8_t> iv_spd_data; /// /// @brief default ctor @@ -60,6 +64,15 @@ class dimm_module_decoder dimm_module_decoder() = default; /// + /// @brief ctor + /// + dimm_module_decoder(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, + const std::vector<uint8_t>& i_spd_data): iv_target(i_target), iv_spd_data(i_spd_data) + { + fapi2::toString(iv_target, iv_target_str_storage, fapi2::MAX_ECMD_STRING_LEN); + } + + /// /// @brief default dtor /// virtual ~dimm_module_decoder() = default; @@ -508,6 +521,11 @@ class dimm_module_decoder o_output = 0; return fapi2::FAPI2_RC_SUCCESS; } + + protected: + + char iv_target_str_storage[fapi2::MAX_ECMD_STRING_LEN]; + }; /// diff --git a/src/import/generic/memory/lib/spd/common/rcw_settings.H b/src/import/generic/memory/lib/spd/common/rcw_settings.H index 91e4af8e8..b28d5a3e1 100644 --- a/src/import/generic/memory/lib/spd/common/rcw_settings.H +++ b/src/import/generic/memory/lib/spd/common/rcw_settings.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief Raw card data structure /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP diff --git a/src/import/generic/memory/lib/spd/common/spd_decoder_base.H b/src/import/generic/memory/lib/spd/common/spd_decoder_base.H index 38949efce..53b931b40 100644 --- a/src/import/generic/memory/lib/spd/common/spd_decoder_base.H +++ b/src/import/generic/memory/lib/spd/common/spd_decoder_base.H @@ -28,7 +28,7 @@ /// @brief SPD decoder declarations /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 2 // *HWP Consumed by: HB:FSP @@ -59,8 +59,11 @@ template< const field_t& F > inline uint8_t extract_spd_field(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data) { + char l_target_str_storage[fapi2::MAX_ECMD_STRING_LEN]; + fapi2::toString(i_target, l_target_str_storage, fapi2::MAX_ECMD_STRING_LEN); + FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(i_target), + l_target_str_storage, F.iv_byte, i_spd_data[F.iv_byte]); @@ -84,8 +87,11 @@ inline uint8_t extract_spd_field(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i const field_t& i_field, const std::vector<uint8_t>& i_spd_data) { + char l_target_str_storage[fapi2::MAX_ECMD_STRING_LEN]; + fapi2::toString(i_target, l_target_str_storage, fapi2::MAX_ECMD_STRING_LEN); + FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(i_target), + l_target_str_storage, i_field.iv_byte, i_spd_data[i_field.iv_byte]); @@ -105,6 +111,7 @@ inline uint8_t extract_spd_field(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i class decoder { protected: + char iv_target_str_storage[fapi2::MAX_ECMD_STRING_LEN]; /// /// @brief Helper function that turns Logical ranks in Primary SDRAM type @@ -154,7 +161,9 @@ class decoder iv_module_decoder(i_module_decoder), iv_spd_data(i_spd_data), iv_raw_card(i_raw_card) - {} + { + fapi2::toString(iv_target, iv_target_str_storage, fapi2::MAX_ECMD_STRING_LEN); + } /// /// @brief Default dtor diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H index 087c4b596..f8031274e 100644 --- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H +++ b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief LRDIMM module SPD decoder declarations /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -55,10 +55,6 @@ namespace lrdimm /// class decoder_v1_0 : public dimm_module_decoder { - protected: - - const fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_target; - public: // First field - SPD byte @@ -104,12 +100,6 @@ class decoder_v1_0 : public dimm_module_decoder constexpr static field_t DATA_BUFFER_GAIN_ADJUST{156, 7, 1}; constexpr static field_t DATA_BUFFER_DFE{156, 6, 1}; - // Allows injection of errors for testing - // TK - Consider API change to use setter/getters - // for this instance variable, RDIMM decoder - // uses this interface so they have to match - AAM - std::vector<uint8_t> iv_spd_data; - // deleted default ctor decoder_v1_0() = delete; @@ -120,7 +110,7 @@ class decoder_v1_0 : public dimm_module_decoder /// decoder_v1_0(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, const std::vector<uint8_t>& i_spd_data) - : iv_target(i_target), iv_spd_data(i_spd_data) + : dimm_module_decoder(i_target, i_spd_data) {} /// diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_0.C b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_0.C index 1adf585bb..dc3ef9cad 100644 --- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_0.C +++ b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_0.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief LRDIMM module SPD decoder definitions for revision 1.0 /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -65,13 +65,13 @@ namespace lrdimm // For LRDIMM module rev 1.0 ///////////////////////// +/// /// @brief Helper function to find SPD byte based on freq /// @param[in] i_dimm_speed DIMM speed in MT/s /// @param[out] o_byte byte to extract spd from /// @return FAPI2_RC_SUCCESS if okay /// @note SPD spec sets encoding based on freq ranges such as, 1866 < data rate <= 2400, -/// But for Nimbus we can only be 1866, 2133, 2400, and 2666. No intermediate values -/// so we use a simple case statement to get our results. +/// static fapi2::ReturnCode mdq_helper(const uint64_t i_dimm_speed, uint8_t& o_byte) { switch(i_dimm_speed) @@ -98,13 +98,13 @@ static fapi2::ReturnCode mdq_helper(const uint64_t i_dimm_speed, uint8_t& o_byte return fapi2::FAPI2_RC_SUCCESS; }; +/// /// @brief Helper function to find start bit based on freq /// @param[in] i_dimm_speed DIMM speed in MT/s /// @param[out] o_start_bit start bit to extract SPD from /// @return FAPI2_RC_SUCCESS if okay /// @note SPD spec sets encoding based on freq ranges such as, 1866 < data rate <= 2400, -/// But for Nimbus we can only be 1866, 2133, 2400, and 2666. No intermediate values -/// so we use a simple case statement to get our results. +/// static fapi2::ReturnCode drive_strength_start_bit_finder(const uint64_t i_dimm_speed, size_t& o_start_bit) { switch(i_dimm_speed) @@ -131,13 +131,13 @@ static fapi2::ReturnCode drive_strength_start_bit_finder(const uint64_t i_dimm_s return fapi2::FAPI2_RC_SUCCESS; } +/// /// @brief Helper function to find SPD byte based on freq /// @param[in] i_dimm_speed DIMM speed in MT/s /// @param[out] o_byte byte to extract spd from /// @return FAPI2_RC_SUCCESS if okay /// @note SPD spec sets encoding based on freq ranges such as, 1866 < data rate <= 2400, -/// But for Nimbus we can only be 1866, 2133, 2400, and 2666. No intermediate values -/// so we use a simple case statement to get our results. +/// static fapi2::ReturnCode rtt_wr_and_nom_byte_finder(const uint64_t i_dimm_speed, size_t& o_byte) { switch(i_dimm_speed) @@ -164,13 +164,13 @@ static fapi2::ReturnCode rtt_wr_and_nom_byte_finder(const uint64_t i_dimm_speed, return fapi2::FAPI2_RC_SUCCESS; } +/// /// @brief Helper function to find SPD byte based on freq /// @param[in] i_dimm_speed DIMM speed in MT/s /// @param[out] o_byte byte to extract spd from /// @return FAPI2_RC_SUCCESS if okay /// @note SPD spec sets encoding based on freq ranges such as, 1866 < data rate <= 2400, -/// But for Nimbus we can only be 1866, 2133, 2400, and 2666. No intermediate values -/// so we use a simple case statement to get our results. +/// static fapi2::ReturnCode rtt_park_byte_finder(const uint64_t i_dimm_speed, size_t& o_byte) { switch(i_dimm_speed) @@ -213,8 +213,8 @@ static fapi2::ReturnCode rtt_park_byte_finder(const uint64_t i_dimm_speed, size_ /// fapi2::ReturnCode decoder_v1_0::max_module_nominal_height(uint8_t& o_output) const { - uint8_t l_field_bits = extract_spd_field< MODULE_NOMINAL_HEIGHT >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< MODULE_NOMINAL_HEIGHT >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 0b11111; @@ -229,7 +229,7 @@ fapi2::ReturnCode decoder_v1_0::max_module_nominal_height(uint8_t& o_output) con o_output = l_field_bits; FAPI_INF("%s. Max module nominal height: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -247,8 +247,8 @@ fapi_try_exit: /// fapi2::ReturnCode decoder_v1_0::raw_card_extension(uint8_t& o_output) const { - uint8_t l_field_bits = extract_spd_field< RAW_CARD_EXTENSION >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< RAW_CARD_EXTENSION >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 0b111; @@ -263,7 +263,7 @@ fapi2::ReturnCode decoder_v1_0::raw_card_extension(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Raw card extension: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -282,9 +282,9 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::front_module_max_thickness(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< FRONT_MODULE_THICKNESS >(iv_target, iv_spd_data); + const uint8_t l_field_bits = extract_spd_field< FRONT_MODULE_THICKNESS >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 0b1111; @@ -299,7 +299,7 @@ fapi2::ReturnCode decoder_v1_0::front_module_max_thickness(uint8_t& o_output) co o_output = l_field_bits; FAPI_INF("%s. Front module max thickness: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -319,8 +319,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::back_module_max_thickness(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< BACK_MODULE_THICKNESS >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< BACK_MODULE_THICKNESS >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 0b1111; @@ -335,7 +335,7 @@ fapi2::ReturnCode decoder_v1_0::back_module_max_thickness(uint8_t& o_output) con o_output = l_field_bits; FAPI_INF("%s. Back module max thickness: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -355,8 +355,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::num_registers_used(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< NUM_REGISTERS_USED >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< NUM_REGISTERS_USED >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t RESERVED = 0b10; @@ -371,7 +371,7 @@ fapi2::ReturnCode decoder_v1_0::num_registers_used(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Number of registers used on LRDIMM : %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -390,8 +390,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::num_rows_of_drams(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< NUM_ROWS_OF_DRAMS >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< NUM_ROWS_OF_DRAMS >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t RESERVED = 0b11; @@ -406,7 +406,7 @@ fapi2::ReturnCode decoder_v1_0::num_rows_of_drams(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Number of rows of DRAMs on LRDIMM : %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -426,8 +426,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::heat_spreader_solution(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< HEAT_SPREADER_SOLUTION >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< HEAT_SPREADER_SOLUTION >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 1; @@ -442,7 +442,7 @@ fapi2::ReturnCode decoder_v1_0::heat_spreader_solution(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Heat spreader solution: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -461,8 +461,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::num_continuation_codes(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< CONTINUATION_CODES >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< CONTINUATION_CODES >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 10; // JEP106AS spec @@ -477,7 +477,7 @@ fapi2::ReturnCode decoder_v1_0::num_continuation_codes(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Number of continuation codes: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -500,7 +500,7 @@ fapi2::ReturnCode decoder_v1_0::reg_manufacturer_id_code(uint8_t& o_output) cons // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_raw_byte); @@ -508,7 +508,7 @@ fapi2::ReturnCode decoder_v1_0::reg_manufacturer_id_code(uint8_t& o_output) cons o_output = l_raw_byte; FAPI_INF("%s. Register revision number: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); return fapi2::FAPI2_RC_SUCCESS; @@ -530,7 +530,7 @@ fapi2::ReturnCode decoder_v1_0::register_rev_num(uint8_t& o_output) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_raw_byte); @@ -538,7 +538,7 @@ fapi2::ReturnCode decoder_v1_0::register_rev_num(uint8_t& o_output) const o_output = l_raw_byte; FAPI_INF("%s. Register revision number: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); return fapi2::FAPI2_RC_SUCCESS; @@ -556,8 +556,8 @@ fapi2::ReturnCode decoder_v1_0::register_rev_num(uint8_t& o_output) const fapi2::ReturnCode decoder_v1_0::register_to_dram_addr_mapping(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< ADDR_MAPPING >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< ADDR_MAPPING >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VAL = 1; @@ -572,7 +572,7 @@ fapi2::ReturnCode decoder_v1_0::register_to_dram_addr_mapping(uint8_t& o_output) o_output = l_field_bits; FAPI_INF("%s. Address mapping from register to dram: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -591,8 +591,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::cke_signal_output_driver(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< CKE_DRIVE_STRENGTH >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< CKE_DRIVE_STRENGTH >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t RESERVED = 3; @@ -607,7 +607,7 @@ fapi2::ReturnCode decoder_v1_0::cke_signal_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CKE: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -626,8 +626,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::odt_signal_output_driver(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< ODT_DRIVE_STRENGTH >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< ODT_DRIVE_STRENGTH >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t RESERVED = 3; @@ -642,7 +642,7 @@ fapi2::ReturnCode decoder_v1_0::odt_signal_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for ODT: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -661,8 +661,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::ca_signal_output_driver(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< CA_DRIVE_STRENGTH >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< CA_DRIVE_STRENGTH >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t INVALID_VAL = 4; @@ -677,7 +677,7 @@ fapi2::ReturnCode decoder_v1_0::ca_signal_output_driver(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CA: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -696,8 +696,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::cs_signal_output_driver(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< CS_DRIVE_STRENGTH >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< CS_DRIVE_STRENGTH >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t RESERVED = 3; @@ -712,7 +712,7 @@ fapi2::ReturnCode decoder_v1_0::cs_signal_output_driver(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CS: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -731,8 +731,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::b_side_clk_output_driver(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< B_SIDE_DRIVE_STRENGTH >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< B_SIDE_DRIVE_STRENGTH >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t RESERVED = 3; @@ -747,7 +747,7 @@ fapi2::ReturnCode decoder_v1_0::b_side_clk_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for clock (Y0,Y2): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -766,8 +766,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::a_side_clk_output_driver(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< A_SIDE_DRIVE_STRENGTH >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< A_SIDE_DRIVE_STRENGTH >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t RESERVED = 3; @@ -782,7 +782,7 @@ fapi2::ReturnCode decoder_v1_0::a_side_clk_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for clock (Y1,Y3): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -806,7 +806,7 @@ fapi2::ReturnCode decoder_v1_0::data_buffer_rev(uint8_t& o_output) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_raw_byte); @@ -823,7 +823,7 @@ fapi2::ReturnCode decoder_v1_0::data_buffer_rev(uint8_t& o_output) const o_output = l_raw_byte; FAPI_INF("%s. Data buffer rev: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -843,8 +843,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank0(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK0 >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK0 >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // JESD79-4 specification constexpr size_t RESERVED = 0b110011; @@ -859,7 +859,7 @@ fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank0(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. DRAM VrefDQ for Package Rank 0: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -878,8 +878,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank1(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK1 >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK1 >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // JESD79-4 specification constexpr size_t RESERVED = 0b110011; @@ -894,7 +894,7 @@ fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank1(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. DRAM VrefDQ for Package Rank 1: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -913,8 +913,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank2(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK2 >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK2 >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // JESD79-4 specification constexpr size_t RESERVED = 0b110011; @@ -929,7 +929,7 @@ fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank2(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. DRAM VrefDQ for Package Rank 2: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -948,8 +948,8 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank3(uint8_t& o_output) const { // Extracting desired bits - uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK3 >(iv_target, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field< VREF_DQ_RANK3 >(iv_target, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // JESD79-4 specification constexpr size_t RESERVED = 0b110011; @@ -964,7 +964,7 @@ fapi2::ReturnCode decoder_v1_0::dram_vref_dq_rank3(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. DRAM VrefDQ for Package Rank 3: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -987,7 +987,7 @@ fapi2::ReturnCode decoder_v1_0::data_buffer_vref_dq(uint8_t& o_output) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_raw_data); @@ -1004,7 +1004,7 @@ fapi2::ReturnCode decoder_v1_0::data_buffer_vref_dq(uint8_t& o_output) const o_output = l_raw_data; FAPI_INF("%s. Data buffer VrefDQ for DRAM interface: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -1025,7 +1025,6 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::data_buffer_mdq_drive_strength(const uint64_t i_dimm_speed, uint8_t& o_output) const { uint8_t l_byte = 0; - uint8_t l_field_bits = 0; FAPI_TRY( mdq_helper(i_dimm_speed, l_byte) ); @@ -1034,8 +1033,8 @@ fapi2::ReturnCode decoder_v1_0::data_buffer_mdq_drive_strength(const uint64_t i_ constexpr size_t LEN = 3; const field_t MDQ_DRIVE_STRENGTH(l_byte, START, LEN); - l_field_bits = extract_spd_field( iv_target, MDQ_DRIVE_STRENGTH, iv_spd_data ); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field( iv_target, MDQ_DRIVE_STRENGTH, iv_spd_data ); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // Lets make sure we aren't being set to a reserved field bool is_reserved_bit = false; @@ -1068,7 +1067,7 @@ fapi2::ReturnCode decoder_v1_0::data_buffer_mdq_drive_strength(const uint64_t i_ o_output = l_field_bits; FAPI_INF("%s. DRAM interface MDQ Drive Strenth: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); } @@ -1090,7 +1089,6 @@ fapi_try_exit: fapi2::ReturnCode decoder_v1_0::data_buffer_mdq_rtt(const uint64_t i_dimm_speed, uint8_t& o_output) const { uint8_t l_byte = 0; - uint8_t l_field_bits = 0; FAPI_TRY( mdq_helper(i_dimm_speed, l_byte) ); @@ -1099,8 +1097,8 @@ fapi2::ReturnCode decoder_v1_0::data_buffer_mdq_rtt(const uint64_t i_dimm_speed, constexpr size_t LEN = 3; const field_t DATA_BUFFER_MDQ_RTT(l_byte, START, LEN); - l_field_bits = extract_spd_field( iv_target, DATA_BUFFER_MDQ_RTT, iv_spd_data ); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field( iv_target, DATA_BUFFER_MDQ_RTT, iv_spd_data ); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 7; @@ -1115,7 +1113,7 @@ fapi2::ReturnCode decoder_v1_0::data_buffer_mdq_rtt(const uint64_t i_dimm_speed, o_output = l_field_bits; FAPI_INF("%s. DRAM interface MDQ RTT: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); } fapi_try_exit: @@ -1143,8 +1141,8 @@ fapi2::ReturnCode decoder_v1_0::dram_drive_strength(const uint64_t i_dimm_speed, constexpr size_t LEN = 2; const field_t DRAM_DRIVE_STRENGTH(BYTE_INDEX, l_start, LEN); - uint8_t l_field_bits = extract_spd_field( iv_target, DRAM_DRIVE_STRENGTH, iv_spd_data ); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field( iv_target, DRAM_DRIVE_STRENGTH, iv_spd_data ); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // SPD JEDEC specification constexpr size_t RESERVED = 0b11; @@ -1159,7 +1157,7 @@ fapi2::ReturnCode decoder_v1_0::dram_drive_strength(const uint64_t i_dimm_speed, o_output = l_field_bits; FAPI_INF("%s. DRAM drive strenth: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); } @@ -1188,8 +1186,8 @@ fapi2::ReturnCode decoder_v1_0::dram_rtt_nom(const uint64_t i_dimm_speed, uint8_ constexpr size_t LEN = 3; const field_t DRAM_RTT_NOM(l_byte, START, LEN); - uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_NOM, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_NOM, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 7; @@ -1204,7 +1202,7 @@ fapi2::ReturnCode decoder_v1_0::dram_rtt_nom(const uint64_t i_dimm_speed, uint8_ o_output = l_field_bits; FAPI_INF("%s. DRAM RTT_NOM: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); } @@ -1233,8 +1231,8 @@ fapi2::ReturnCode decoder_v1_0::dram_rtt_wr(const uint64_t i_dimm_speed, uint8_t constexpr size_t LEN = 3; const field_t DRAM_RTT_WR(l_byte, START, LEN); - uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_WR, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_WR, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // Lets make sure we aren't being set to a reserved field bool is_reserved_bit = false; @@ -1266,7 +1264,7 @@ fapi2::ReturnCode decoder_v1_0::dram_rtt_wr(const uint64_t i_dimm_speed, uint8_t o_output = l_field_bits; FAPI_INF("%s. DRAM_RTT_WR: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); } @@ -1295,8 +1293,8 @@ fapi2::ReturnCode decoder_v1_0::dram_rtt_park_ranks0_1(const uint64_t i_dimm_spe constexpr size_t LEN = 3; const field_t DRAM_RTT_PARK(l_byte, START, LEN); - uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_PARK, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_PARK, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 7; @@ -1311,7 +1309,7 @@ fapi2::ReturnCode decoder_v1_0::dram_rtt_park_ranks0_1(const uint64_t i_dimm_spe o_output = l_field_bits; FAPI_INF("%s. DRAM RTT_PARK (package ranks 0,1): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); } @@ -1340,8 +1338,8 @@ fapi2::ReturnCode decoder_v1_0::dram_rtt_park_ranks2_3(const uint64_t i_dimm_spe constexpr size_t LEN = 3; const field_t DRAM_RTT_PARK(l_byte, START, LEN); - uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_PARK, iv_spd_data); - FAPI_INF("Field Bits value: %d", l_field_bits); + const uint8_t l_field_bits = extract_spd_field(iv_target, DRAM_RTT_PARK, iv_spd_data); + FAPI_INF("%s Field Bits value: %d", iv_target_str_storage, l_field_bits); // This checks my extracting params returns a value within bound constexpr size_t MAX_VALID_VALUE = 7; @@ -1356,7 +1354,7 @@ fapi2::ReturnCode decoder_v1_0::dram_rtt_park_ranks2_3(const uint64_t i_dimm_spe o_output = l_field_bits; FAPI_INF("%s. DRAM RTT_PARK (package ranks 2,3): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); } diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_1.C b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_1.C index 5717da12d..3cccbb654 100644 --- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_1.C +++ b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_1.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief LRDIMM module SPD decoder definitions for revision 1.1 /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -87,7 +87,7 @@ fapi2::ReturnCode decoder_v1_1::register_and_buffer_type(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register and Data Buffer Types: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -123,7 +123,7 @@ fapi2::ReturnCode decoder_v1_1::cke_signal_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CKE: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -158,7 +158,7 @@ fapi2::ReturnCode decoder_v1_1::odt_signal_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for ODT: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -193,7 +193,7 @@ fapi2::ReturnCode decoder_v1_1::cs_signal_output_driver(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CS: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -228,7 +228,7 @@ fapi2::ReturnCode decoder_v1_1::b_side_clk_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for clock (Y0,Y2): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -263,7 +263,7 @@ fapi2::ReturnCode decoder_v1_1::a_side_clk_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for clock (Y1,Y3): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_2.C b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_2.C index d48b1444e..029ad635e 100644 --- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_2.C +++ b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_decoder_ddr4_v1_2.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief LRDIMM module SPD decoder definitions for revision 1.2 /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -87,7 +87,7 @@ fapi2::ReturnCode decoder_v1_2::bcom_bcke_bodt_drive_strength(uint8_t& o_output) o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for data buffer control (BCOM, BODT, BCKE): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -122,7 +122,7 @@ fapi2::ReturnCode decoder_v1_2::bck_output_drive_strength(uint8_t& o_output) con o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for data buffer control (BCK): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -157,7 +157,7 @@ fapi2::ReturnCode decoder_v1_2::slew_rate_control(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. RCD output slew rate control: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -192,7 +192,7 @@ fapi2::ReturnCode decoder_v1_2::dram_vref_dq_range(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. VrefDQ range for DRAM interface range: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -227,7 +227,7 @@ fapi2::ReturnCode decoder_v1_2::data_buffer_vref_dq_range(uint8_t& o_output) con o_output = l_field_bits; FAPI_INF("%s. Data buffer VrefDQ range for DRAM interface range: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -262,7 +262,7 @@ fapi2::ReturnCode decoder_v1_2::data_buffer_gain_adjustment(uint8_t& o_output) c o_output = l_field_bits; FAPI_INF("%s. Data buffer gain adjustment: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -297,7 +297,7 @@ fapi2::ReturnCode decoder_v1_2::data_buffer_dfe(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Data buffer Decision Feedback Equalization (DFE): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_raw_cards.C b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_raw_cards.C index e7ac40546..182b3fa34 100644 --- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_raw_cards.C +++ b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_raw_cards.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -29,7 +29,7 @@ /// Contains RCW settings per raw card rev /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: FSP:HB diff --git a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_raw_cards.H b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_raw_cards.H index a7083cd16..2b3e4285d 100644 --- a/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_raw_cards.H +++ b/src/import/generic/memory/lib/spd/lrdimm/ddr4/lrdimm_raw_cards.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief Raw card data structure /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP diff --git a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H index 61d47700d..0ec15c90e 100644 --- a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H +++ b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief RDIMM module SPD decoder declarations /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -55,6 +55,7 @@ namespace rdimm class decoder_v1_0 : public dimm_module_decoder { protected: + enum { // Byte 128 @@ -160,7 +161,8 @@ class decoder_v1_0 : public dimm_module_decoder /// @param[in] i_spd_data vector DIMM SPD data /// decoder_v1_0(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - const std::vector<uint8_t>& i_spd_data): iv_target(i_target), iv_spd_data(i_spd_data) + const std::vector<uint8_t>& i_spd_data): + dimm_module_decoder(i_target, i_spd_data) {} /// @@ -355,10 +357,6 @@ class decoder_v1_0 : public dimm_module_decoder /// virtual fapi2::ReturnCode a_side_clk_output_driver(uint8_t& o_output) const override; - protected: - const fapi2::Target<fapi2::TARGET_TYPE_DIMM> iv_target; - const std::vector<uint8_t> iv_spd_data; - };// decoder_v1_0 /// diff --git a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4_v1_0.C b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4_v1_0.C index 4d4635bc2..021130412 100644 --- a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4_v1_0.C +++ b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4_v1_0.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,7 +27,7 @@ /// @brief RDIMM module specific SPD decoder definitions /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP @@ -91,7 +91,7 @@ fapi2::ReturnCode decoder_v1_0::max_module_nominal_height(uint8_t& o_output) con o_output = l_field_bits; FAPI_INF("%s. Max module nominal height: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -125,7 +125,7 @@ fapi2::ReturnCode decoder_v1_0::front_module_max_thickness(uint8_t& o_output) co o_output = l_field_bits; FAPI_INF("%s. Front module max thickness: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -160,7 +160,7 @@ fapi2::ReturnCode decoder_v1_0::back_module_max_thickness(uint8_t& o_output) con o_output = l_field_bits; FAPI_INF("%s. Back module max thickness: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -195,7 +195,7 @@ fapi2::ReturnCode decoder_v1_0::num_registers_used(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Number of registers used on RDIMM : %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -230,7 +230,7 @@ fapi2::ReturnCode decoder_v1_0::num_rows_of_drams(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Number of rows of DRAMs on RDIMM : %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -265,7 +265,7 @@ fapi2::ReturnCode decoder_v1_0::heat_spreader_thermal_char(uint8_t& o_output) co o_output = l_field_bits; FAPI_INF("%s. Heat spreader thermal characteristics: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -299,7 +299,7 @@ fapi2::ReturnCode decoder_v1_0::heat_spreader_solution(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Heat spreader solution: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -334,7 +334,7 @@ fapi2::ReturnCode decoder_v1_0::num_continuation_codes(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Number of continuation codes: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -358,14 +358,14 @@ fapi2::ReturnCode decoder_v1_0::reg_manufacturer_id_code(uint8_t& o_output) cons // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_raw_byte); o_output = l_raw_byte; FAPI_INF("%s. Manufacturer ID code: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); return fapi2::FAPI2_RC_SUCCESS; @@ -387,14 +387,14 @@ fapi2::ReturnCode decoder_v1_0::register_rev_num(uint8_t& o_output) const // Trace in the front assists w/ debug FAPI_INF("%s SPD data at Byte %d: 0x%llX.", - mss::c_str(iv_target), + iv_target_str_storage, BYTE_INDEX, l_raw_byte); o_output = l_raw_byte; FAPI_INF("%s. Register revision number: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); return fapi2::FAPI2_RC_SUCCESS; @@ -427,7 +427,7 @@ fapi2::ReturnCode decoder_v1_0::register_to_dram_addr_mapping(uint8_t& o_output) o_output = l_field_bits; FAPI_INF("%s. Address mapping from register to dram: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -461,7 +461,7 @@ fapi2::ReturnCode decoder_v1_0::cke_signal_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CKE: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -495,7 +495,7 @@ fapi2::ReturnCode decoder_v1_0::odt_signal_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for ODT: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -529,7 +529,7 @@ fapi2::ReturnCode decoder_v1_0::ca_signal_output_driver(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CA: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -563,7 +563,7 @@ fapi2::ReturnCode decoder_v1_0::cs_signal_output_driver(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CS: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -597,7 +597,7 @@ fapi2::ReturnCode decoder_v1_0::b_side_clk_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for clock (Y0,Y2): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -631,7 +631,7 @@ fapi2::ReturnCode decoder_v1_0::a_side_clk_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for clock (Y1,Y3): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: diff --git a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4_v1_1.C b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4_v1_1.C index a1549a6db..9a6aa5446 100644 --- a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4_v1_1.C +++ b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_decoder_ddr4_v1_1.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -84,7 +84,7 @@ fapi2::ReturnCode decoder_v1_1::register_and_buffer_type(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Types: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -119,7 +119,7 @@ fapi2::ReturnCode decoder_v1_1::cke_signal_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CKE: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -153,7 +153,7 @@ fapi2::ReturnCode decoder_v1_1::odt_signal_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for ODT: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -187,7 +187,7 @@ fapi2::ReturnCode decoder_v1_1::cs_signal_output_driver(uint8_t& o_output) const o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for CS: %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -221,7 +221,7 @@ fapi2::ReturnCode decoder_v1_1::b_side_clk_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for clock (Y0,Y2): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: @@ -255,7 +255,7 @@ fapi2::ReturnCode decoder_v1_1::a_side_clk_output_driver(uint8_t& o_output) cons o_output = l_field_bits; FAPI_INF("%s. Register Output Driver for clock (Y1,Y3): %d", - mss::c_str(iv_target), + iv_target_str_storage, o_output); fapi_try_exit: diff --git a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_raw_cards.C b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_raw_cards.C index 0fa879212..19a839e17 100644 --- a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_raw_cards.C +++ b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_raw_cards.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -29,7 +29,7 @@ /// Contains RCW settings per raw card rev /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: FSP:HB diff --git a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_raw_cards.H b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_raw_cards.H index da834abbd..fedcbe356 100644 --- a/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_raw_cards.H +++ b/src/import/generic/memory/lib/spd/rdimm/ddr4/rdimm_raw_cards.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -28,7 +28,7 @@ /// @brief Raw card data structure /// // *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -// *HWP HWP Backup: Jacob Harvey <jlharvey@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> // *HWP Team: Memory // *HWP Level: 3 // *HWP Consumed by: HB:FSP |
