Add missing attributes needed to be set for generic mss_kind

Setting DRAM_MFG_ID, RCD_MFG_ID, and MODULE_HEIGHT
to eff_config and editing SPD timing values to use common
API for calculations that come with  values from
the EEPROM

Change-Id: If33f2f2a49a62f114575ef36d6325fc537d1dc27
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79921
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79936
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>

6 files changed, 234 insertions, 3 deletions

diff --git a/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H b/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H
index 8ff2e30fa..c8ab503ec 100644
--- a/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H
+++ b/src/import/generic/memory/lib/spd/common/dimm_module_decoder.H
@@ -1490,6 +1490,17 @@ class dimm_module_decoder
             o_output = 0;
             return fapi2::FAPI2_RC_SUCCESS;
         }
+
+        ///
+        /// @brief Decodes DRAM Manufacturer ID code
+        /// @param[out] o_value dram manufacturing id code
+        /// @return FAPI2_RC_SUCCESS iff okay
+        ///
+        virtual fapi2::ReturnCode dram_manufacturer_id_code( uint16_t& o_value ) const
+        {
+            o_value = 0;
+            return fapi2::FAPI2_RC_SUCCESS;
+        }
 };
 
 }// spd
diff --git a/src/import/generic/memory/lib/spd/common/spd_decoder_base.H b/src/import/generic/memory/lib/spd/common/spd_decoder_base.H
index 878d2f27e..d69d216b5 100644
--- a/src/import/generic/memory/lib/spd/common/spd_decoder_base.H
+++ b/src/import/generic/memory/lib/spd/common/spd_decoder_base.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2017,2018                        */
+/* Contributors Listed Below - COPYRIGHT 2017,2019                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -788,6 +788,66 @@ class base_cnfg_decoder
         }
 
         ///
+        /// @brief Decodes Fine Offset for tWTR_L
+        /// @param[out] o_value tWTR_L offset in FTB units
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        virtual fapi2::ReturnCode fine_offset_min_twtr_l( int64_t& o_value ) const
+        {
+            o_value = 0;
+            return fapi2::FAPI2_RC_SUCCESS;
+        }
+
+        ///
+        /// @brief Decodes Fine Offset for twtr_s
+        /// @param[out] o_value twtr_s offset in FTB units
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        virtual fapi2::ReturnCode fine_offset_min_twtr_s( int64_t& o_value ) const
+        {
+            o_value = 0;
+            return fapi2::FAPI2_RC_SUCCESS;
+        }
+
+        ///
+        /// @brief Decodes Fine Offset for tfaw
+        /// @param[out] o_value tfaw offset in FTB units
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        virtual fapi2::ReturnCode fine_offset_min_tfaw( int64_t& o_value ) const
+        {
+            o_value = 0;
+            return fapi2::FAPI2_RC_SUCCESS;
+        }
+
+        ///
+        /// @brief Decodes Fine Offset for tras
+        /// @param[out] o_value tras offset in FTB units
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        virtual fapi2::ReturnCode fine_offset_min_tras( int64_t& o_value ) const
+        {
+            o_value = 0;
+            return fapi2::FAPI2_RC_SUCCESS;
+        }
+
+        ///
+        /// @brief Decodes Fine Offset for twr
+        /// @param[out] o_value twr offset in FTB units
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        virtual fapi2::ReturnCode fine_offset_min_twr( int64_t& o_value ) const
+        {
+            o_value = 0;
+            return fapi2::FAPI2_RC_SUCCESS;
+        }
+
+        ///
         /// @brief Decodes Cyclical Redundancy Code (CRC) for Base Configuration Section
         /// @param[out] o_value crc value from SPD
         /// @return FAPI2_RC_SUCCESS iff okay
diff --git a/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H b/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H
index 00f893a39..7c1b4f5c9 100644
--- a/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H
+++ b/src/import/generic/memory/lib/spd/ddimm/ddr4/ddimm_decoder_ddr4.H
@@ -54,7 +54,7 @@ namespace spd
 /// @brief DDIMM module SPD DRAM decoder
 ///
 template < rev R >
-class decoder<DDR4, DDIMM_MODULE, R > : public dimm_module_decoder
+class decoder< DDR4, DDIMM_MODULE, R > : public dimm_module_decoder
 {
     private:
 
@@ -1399,6 +1399,32 @@ class decoder<DDR4, DDIMM_MODULE, R > : public dimm_module_decoder
             return fapi2::current_err;
         }
 
+        ///
+        /// @brief Decodes DRAM manufacturing ID Code
+        /// @param[out] o_output encoding from SPD
+        /// @return FAPI2_RC_SUCCESS if okay
+        ///
+        virtual fapi2::ReturnCode dram_manufacturer_id_code(uint16_t& o_output) const override
+        {
+            uint8_t l_byte0 = 0;
+            uint8_t l_byte1 = 0;
+
+            FAPI_TRY( (mss::spd::reader<fields_t::DRAM_MFR_ID_CODE_LSB, R>(iv_target, iv_data, l_byte0)) );
+            FAPI_TRY( (mss::spd::reader<fields_t::DRAM_MFR_ID_CODE_MSB, R>(iv_target, iv_data, l_byte1)) );
+
+            {
+                fapi2::buffer<uint16_t> l_buffer;
+                right_aligned_insert(l_buffer, l_byte1, l_byte0);
+                o_output = l_buffer;
+                FAPI_INF("%s. Register Manufacturer ID Code: 0x%04x",
+                         spd::c_str(iv_target),
+                         o_output);
+            }
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
 };// decoder
 
 }// spd
diff --git a/src/import/generic/memory/lib/spd/spd_facade.H b/src/import/generic/memory/lib/spd/spd_facade.H
index 81689604f..009059c09 100644
--- a/src/import/generic/memory/lib/spd/spd_facade.H
+++ b/src/import/generic/memory/lib/spd/spd_facade.H
@@ -48,6 +48,8 @@ inline fapi2::ReturnCode get_raw_data(const fapi2::Target<fapi2::TARGET_TYPE_DIM
     FAPI_TRY( fapi2::getSPD(i_target, nullptr, l_size),
               "%s. Failed to retrieve SPD blob size", spd::c_str(i_target) );
 
+    FAPI_DBG( "SPD size %d for %s", l_size, spd::c_str(i_target) );
+
     // Reassign container size with the retrieved size
     // Arbitrarily set the data to zero since it will be overwritten
     o_spd.assign(l_size, 0);
@@ -74,6 +76,7 @@ class facade final
         std::vector<uint8_t> iv_data;
         std::shared_ptr<dimm_module_decoder> iv_dimm_module_decoder;
         std::shared_ptr<base_cnfg_decoder> iv_base_cnfg_decoder;
+        uint8_t iv_dimm_type;
 
     public:
 
@@ -95,6 +98,11 @@ class facade final
             FAPI_TRY(l_factories.create_decoder(iv_dimm_module_decoder));
             FAPI_TRY(l_factories.create_decoder(iv_base_cnfg_decoder));
 
+            // Variable to deal with dimm modules (e.g. DDIMM) that has
+            // fields that are not disjoint between the
+            // general and dimm module section of the SPD (i.e. a hack variable)
+            FAPI_TRY( iv_base_cnfg_decoder->base_module(iv_dimm_type) );
+
             o_rc = fapi2::FAPI2_RC_SUCCESS;
             return;
 
@@ -854,6 +862,75 @@ class facade final
         }
 
         ///
+        /// @brief Decodes Fine Offset for Minimum Write to Read Time - Same Bank Group
+        /// @param[out] o_value SPD encoded value
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        fapi2::ReturnCode fine_offset_min_twtr_l( int64_t& o_value ) const
+        {
+            FAPI_TRY( iv_base_cnfg_decoder->fine_offset_min_twtr_l(o_value) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+        ///
+        /// @brief Decodes Fine Offset for Minimum Write to Read Time - Different Bank Group
+        /// @param[out] o_value SPD encoded value
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        fapi2::ReturnCode fine_offset_min_twtr_s( int64_t& o_value ) const
+        {
+            FAPI_TRY( iv_base_cnfg_decoder->fine_offset_min_twtr_s(o_value) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+        ///
+        /// @brief Decodes Fine Offset for SDRAM Minimum Four Activate Window Delay Time
+        /// @param[out] o_value SPD encoded value
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        fapi2::ReturnCode fine_offset_min_tfaw( int64_t& o_value ) const
+        {
+            FAPI_TRY( iv_base_cnfg_decoder->fine_offset_min_tfaw(o_value) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+        ///
+        /// @brief Decodes Fine Offset for SDRAM Minimum Active to Precharge Delay Time in MTB
+        /// @param[out] o_value SPD encoded value
+        /// @return FAPI2_RC_SUCCESS iff okay
+        /// @warning not an actual SPD field, defaulted to zero to simplify calculations
+        ///
+        fapi2::ReturnCode fine_offset_min_tras( int64_t& o_value ) const
+        {
+            FAPI_TRY( iv_base_cnfg_decoder->fine_offset_min_tras(o_value) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+        ///
+        /// @brief Decodes Fine Offset for Minimum Write Recovery Time
+        /// @param[out] o_value SPD encoded value
+        /// @return FAPI2_RC_SUCCESS iff okay
+        ///
+        fapi2::ReturnCode fine_offset_min_twr( int64_t& o_value ) const
+        {
+            FAPI_TRY( iv_base_cnfg_decoder->fine_offset_min_twr(o_value) );
+
+        fapi_try_exit:
+            return fapi2::current_err;
+        }
+
+        ///
         /// @brief Decodes Fine Offset for Minimum Activate to Activate Delay Time - Same Bank Group
         /// @param[out] o_value SPD encoded value
         /// @return FAPI2_RC_SUCCESS iff okay
@@ -1041,7 +1118,17 @@ class facade final
         ///
         fapi2::ReturnCode dram_manufacturer_id_code( uint16_t& o_value ) const
         {
-            FAPI_TRY( iv_base_cnfg_decoder->dram_manufacturer_id_code(o_value) );
+            // Some module fields are duplicated in the general section and
+            // dimm module sections of the SPD.  For DDIMMs, we want get it
+            // from the dimm module section instead of the general section.
+            if( iv_dimm_type == spd::DDIMM )
+            {
+                FAPI_TRY( iv_dimm_module_decoder->dram_manufacturer_id_code(o_value) );
+            }
+            else
+            {
+                FAPI_TRY( iv_base_cnfg_decoder->dram_manufacturer_id_code(o_value) );
+            }
 
         fapi_try_exit:
             return fapi2::current_err;
diff --git a/src/import/generic/memory/lib/spd/spd_fields_ddr4.H b/src/import/generic/memory/lib/spd/spd_fields_ddr4.H
index 6739276cb..194eba510 100644
--- a/src/import/generic/memory/lib/spd/spd_fields_ddr4.H
+++ b/src/import/generic/memory/lib/spd/spd_fields_ddr4.H
@@ -1176,6 +1176,12 @@ class fields<DDR4, DDIMM_MODULE>
             PMIC1_PHASE_COMBIN_BYTE = 259,
             PMIC1_PHASE_COMBIN_START = 4,
             PMIC1_PHASE_COMBIN_LEN = 4,
+
+            // Byte 552-553
+            DRAM_MFR_ID_CODE_LSB_BYTE = 552,
+            DRAM_MFR_ID_CODE_MSB_BYTE = 553,
+            DRAM_MFR_ID_CODE_START = 0,
+            DRAM_MFR_ID_CODE_LEN = 8,
         };
 
     public:
@@ -1408,6 +1414,9 @@ class fields<DDR4, DDIMM_MODULE>
         // Byte 259: PMIC1 Phase Combination
         static constexpr field_t PMIC1_PHASE_COMBIN{PMIC1_PHASE_COMBIN_BYTE, PMIC1_PHASE_COMBIN_START, PMIC1_PHASE_COMBIN_LEN};
 
+        // Byte 552 and 553: DRAM manufacturing ID for DDIMMs
+        static constexpr field_t DRAM_MFR_ID_CODE_LSB{DRAM_MFR_ID_CODE_LSB_BYTE, DRAM_MFR_ID_CODE_START, DRAM_MFR_ID_CODE_LEN};
+        static constexpr field_t DRAM_MFR_ID_CODE_MSB{DRAM_MFR_ID_CODE_MSB_BYTE, DRAM_MFR_ID_CODE_START, DRAM_MFR_ID_CODE_LEN};
 };
 
 }// spd
diff --git a/src/import/generic/memory/lib/spd/spd_traits_ddr4.H b/src/import/generic/memory/lib/spd/spd_traits_ddr4.H
index ecdaec291..eb0fde595 100644
--- a/src/import/generic/memory/lib/spd/spd_traits_ddr4.H
+++ b/src/import/generic/memory/lib/spd/spd_traits_ddr4.H
@@ -5551,6 +5551,44 @@ class readerTraits < fields< DDR4, DDIMM_MODULE>::PMIC1_PHASE_COMBIN, R >
         using COMPARISON_OP = std::less_equal<T>;
 };
 
+///
+/// @class readerTraits
+/// @brief trait structure to hold static SPD information
+/// @tparam R the revision of the SPD field
+/// @note DRAM_MFR_ID_CODE_LSB field specialization
+/// @note valid for all revisions
+///
+template< rev R >
+class readerTraits < fields<DDR4, DDIMM_MODULE>::DRAM_MFR_ID_CODE_LSB, R >
+{
+    public:
+
+        static constexpr size_t COMPARISON_VAL = 0x00;
+        static constexpr const char* FIELD_STR = "DRAM manufacturer ID code, LSB";
+
+        template <typename T>
+        using COMPARISON_OP = std::greater_equal<T>;
+};
+
+///
+/// @class readerTraits
+/// @brief trait structure to hold static SPD information
+/// @tparam R the revision of the SPD field
+/// @note DRAM_MFR_ID_CODE_MSB field specialization
+/// @note valid for all revisions
+///
+template< rev R >
+class readerTraits < fields<DDR4, DDIMM_MODULE>::DRAM_MFR_ID_CODE_MSB, R >
+{
+    public:
+
+        static constexpr size_t COMPARISON_VAL = 0x00;
+        static constexpr const char* FIELD_STR = "DRAM manufacturer ID code, MSB";
+
+        template <typename T>
+        using COMPARISON_OP = std::greater_equal<T>;
+};
+
 }// spd
 }// mss