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authorMark Pizzutillo <Mark.Pizzutillo@ibm.com>2019-08-26 18:02:37 -0400
committerChristian R Geddes <crgeddes@us.ibm.com>2019-09-27 13:49:09 -0500
commit48abe5e8afb54e389f45233e66e100a501d038e8 (patch)
tree2a930b0edc5367239fc100baf5df1b45185cf8eb /src/import/generic/memory/lib/spd/spd_fields_ddr4.H
parent04d5973bec03c271184ff87f1e0dbb3aa57857d4 (diff)
downloadtalos-hostboot-48abe5e8afb54e389f45233e66e100a501d038e8.tar.gz
talos-hostboot-48abe5e8afb54e389f45233e66e100a501d038e8.zip
Add support for new pmic sequencing SPD fields
Change-Id: I8847090585161375fbb2c0ef853cffed80a67cc3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82961 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83375 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/generic/memory/lib/spd/spd_fields_ddr4.H')
-rw-r--r--src/import/generic/memory/lib/spd/spd_fields_ddr4.H24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/import/generic/memory/lib/spd/spd_fields_ddr4.H b/src/import/generic/memory/lib/spd/spd_fields_ddr4.H
index 194eba510..b60e69222 100644
--- a/src/import/generic/memory/lib/spd/spd_fields_ddr4.H
+++ b/src/import/generic/memory/lib/spd/spd_fields_ddr4.H
@@ -959,10 +959,10 @@ class fields<DDR4, DDIMM_MODULE>
VIN_BULK_ENDURANT_START = 6,
VIN_BULK_ENDURANT_LEN = 2,
- // Byte 226: VDD_Core PMIC0
- VDD_CORE_PMIC0_BYTE = 226,
- VDD_CORE_PMIC0_START = 0,
- VDD_CORE_PMIC0_LEN = 8,
+ // Byte 226: PMIC0 Sequence
+ PMIC0_SEQUENCE_BYTE = 226,
+ PMIC0_SEQUENCE_START = 0,
+ PMIC0_SEQUENCE_LEN = 8,
// Byte 227: PMIC0 Manfacture ID code 1st byte
PMIC0_MFG_CODE1_BYTE = 227,
@@ -979,10 +979,10 @@ class fields<DDR4, DDIMM_MODULE>
PMIC0_REV_START = 0,
PMIC0_REV_LEN = 8,
- // Byte 230: VDD_Core PMIC1
- VDD_CORE_PMIC1_BYTE = 230,
- VDD_CORE_PMIC1_START = 0,
- VDD_CORE_PMIC1_LEN = 8,
+ // Byte 230: PMIC1 Sequence
+ PMIC1_SEQUENCE_BYTE = 230,
+ PMIC1_SEQUENCE_START = 0,
+ PMIC1_SEQUENCE_LEN = 8,
// Byte 231: PMIC1 Manfacture ID code 1st byte
PMIC1_MFG_CODE1_BYTE = 231,
@@ -1288,8 +1288,8 @@ class fields<DDR4, DDIMM_MODULE>
static constexpr field_t VIN_BULK_OPERABLE{VIN_BULK_BYTE, VIN_BULK_OPERABLE_START, VIN_BULK_OPERABLE_LEN};
static constexpr field_t VIN_BULK_ENDURANT{VIN_BULK_BYTE, VIN_BULK_ENDURANT_START, VIN_BULK_ENDURANT_LEN};
- // Byte 226: VDD_Core PMIC0
- static constexpr field_t VDD_CORE_PMIC0{VDD_CORE_PMIC0_BYTE, VDD_CORE_PMIC0_START, VDD_CORE_PMIC0_LEN};
+ // Byte 226: PMIC0 Sequence
+ static constexpr field_t PMIC0_SEQUENCE{PMIC0_SEQUENCE_BYTE, PMIC0_SEQUENCE_START, PMIC0_SEQUENCE_LEN};
// Byte 227: PMIC0 Manfacture ID code 1st byte
static constexpr field_t PMIC0_CONT_CODE{PMIC0_MFG_CODE1_BYTE, PMIC0_CONT_CODE_START, PMIC0_CONT_CODE_LEN};
@@ -1300,8 +1300,8 @@ class fields<DDR4, DDIMM_MODULE>
// Byte 229: PMIC0 Revision Number
static constexpr field_t PMIC0_REV{PMIC0_REV_BYTE, PMIC0_REV_START, PMIC0_REV_LEN};
- // Byte 230: VDD_Core PMIC1
- static constexpr field_t VDD_CORE_PMIC1{VDD_CORE_PMIC1_BYTE, VDD_CORE_PMIC1_START, VDD_CORE_PMIC1_LEN};
+ // Byte 230: PMIC1 Sequence
+ static constexpr field_t PMIC1_SEQUENCE{PMIC1_SEQUENCE_BYTE, PMIC1_SEQUENCE_START, PMIC1_SEQUENCE_LEN};
// Byte 231: PMIC1 Manfacture ID code 1st byte
static constexpr field_t PMIC1_CONT_CODE{PMIC1_MFG_CODE1_BYTE, PMIC1_CONT_CODE_START, PMIC1_CONT_CODE_LEN};
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