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authorJoe McGill <jmcgill@us.ibm.com>2018-07-09 11:29:41 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2018-07-12 11:08:16 -0400
commit6f42293e77046bdcde1c78a2daf613fe2a72360d (patch)
tree224f427fab67ae815ae846f5f318d754b4b0c040 /src/import/chips
parenta048e96b8e00ca1c11df4271f9c53c20ca993ed7 (diff)
downloadtalos-hostboot-6f42293e77046bdcde1c78a2daf613fe2a72360d.tar.gz
talos-hostboot-6f42293e77046bdcde1c78a2daf613fe2a72360d.zip
set PEC disable store thread based ordering chicken switches
Change-Id: I2d9aed7833a1bf43c797689d50ff32794ef54cff CQ: SW430383 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62028 Reviewed-by: Kevin F. Reick <reick@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/62045 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml31
1 files changed, 31 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 3fec59c66..9d41abae5 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -7554,6 +7554,37 @@
</attribute>
<!-- ******************************************************************** -->
<attribute>
+ <id>ATTR_CHIP_EC_FEATURE_SW430383</id>
+ <targetType>TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP,TARGET_TYPE_PROC_CHIP</targetType>
+ <description>
+ Revert PCI store thread based ordering mode for SW430383
+ </description>
+ <chipEcFeature>
+ <chip>
+ <name>ENUM_ATTR_NAME_CUMULUS</name>
+ <ec>
+ <value>0x11</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ <chip>
+ <name>ENUM_ATTR_NAME_NIMBUS</name>
+ <ec>
+ <value>0x23</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ <chip>
+ <name>ENUM_ATTR_NAME_AXONE</name>
+ <ec>
+ <value>0x10</value>
+ <test>GREATER_THAN_OR_EQUAL</test>
+ </ec>
+ </chip>
+ </chipEcFeature>
+ </attribute>
+ <!-- ******************************************************************** -->
+ <attribute>
<id>ATTR_CHIP_EC_FEATURE_SW432374</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
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