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author | Andre Marin <aamarin@us.ibm.com> | 2016-05-31 18:27:50 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-03 16:54:36 -0400 |
commit | 3ce9ab4ec10f7a51579e6c8c1de60c2c07797487 (patch) | |
tree | bf9e18d8907871e4473af4b8b369796835b582d5 /src/import/chips | |
parent | bcb6c08798d47bff3a8b6939d1514c2739cda3a6 (diff) | |
download | talos-hostboot-3ce9ab4ec10f7a51579e6c8c1de60c2c07797487.tar.gz talos-hostboot-3ce9ab4ec10f7a51579e6c8c1de60c2c07797487.zip |
Fix mss_volt wrapper and volt FFDC
Change-Id: I75be5a3731bc5a15bafbaadac5b8282705e9ac66
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25213
Tested-by: Jenkins Server
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Tested-by: Hostboot CI
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25214
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C | 15 | ||||
-rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml | 4 |
2 files changed, 12 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C index f6ac3c67d..6f23ebb1c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C @@ -53,11 +53,11 @@ extern "C" /// fapi2::ReturnCode p9_mss_volt( const std::vector< fapi2::Target<TARGET_TYPE_MCS> >& i_targets ) { - FAPI_INF("Start mss volt"); - // Loop through MCS for (const auto& l_mcs : i_targets) { + FAPI_INF("Populating decoder cache for %s", mss::c_str(l_mcs)); + //Factory cache is per MCS std::map<uint32_t, std::shared_ptr<mss::spd::decoder> > l_factory_caches; FAPI_TRY( mss::spd::populate_decoder_caches(l_mcs, l_factory_caches), @@ -68,7 +68,7 @@ extern "C" { const auto& l_dimm_pos = mss::pos(l_dimm); - // Fiind decoder factory for this dimm position + // Find decoder factory for this dimm position auto l_it = l_factory_caches.find(l_dimm_pos); // Check to make sure it's valid // TODO - RTC 152390 change factory check @@ -87,9 +87,14 @@ extern "C" //Check to make sure 1.2 V is both operable and endurant, fail if it is not FAPI_ASSERT ( (l_dimm_nominal == mss::spd::OPERABLE) && (l_dimm_endurant == mss::spd::ENDURANT), fapi2::MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE(). - set_DIMM_VOLTAGE(uint64_t(mss::DDR4_NOMINAL_VOLTAGE)). + set_OPERABLE(l_dimm_nominal). + set_ENDURANT(l_dimm_endurant). set_DIMM_TARGET(l_dimm), - "1.2V is not operable"); + "%s: DIMM is not operable (%d)" + " and/or endurant (%d) at 1.2V", + mss::c_str(l_dimm), + l_dimm_nominal, + l_dimm_endurant); } // scope } // l_dimm diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml index 31b81a838..7965d19da 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_volt.xml @@ -63,7 +63,8 @@ <hwpError> <rc>RC_MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE</rc> <description>One or more DIMMs do not support required voltage for DDR type.</description> - <ffdc>DIMM_VOLTAGE</ffdc> + <ffdc>OPERABLE</ffdc> + <ffdc>ENDURANT</ffdc> <callout> <target>DIMM_TARGET</target> <priority>HIGH</priority> @@ -106,4 +107,3 @@ </hwpError> </hwpErrors> - |