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authorLouis Stermole <stermole@us.ibm.com>2019-04-11 17:06:23 -0400
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-04-25 12:35:39 -0500
commit357441ef8b732b8f2b0a697d2ae7c368b3646649 (patch)
treed1349d29077d8b7363ec7de33fb337934e25ec56 /src/import/chips/p9a/procedures
parentaff20d90b9673ae57b1d54996ace5ce9a11ea394 (diff)
downloadtalos-hostboot-357441ef8b732b8f2b0a697d2ae7c368b3646649.tar.gz
talos-hostboot-357441ef8b732b8f2b0a697d2ae7c368b3646649.zip
Add p9a_mss_freq_system procedure
Change-Id: I84317d4886e90aece64ada26d3d7d53ba0868f1e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76023 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Dev-Ready: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76104 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9a/procedures')
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C4
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C42
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.H48
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C2
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C58
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H8
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.mk4
7 files changed, 98 insertions, 68 deletions
diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C
index 08317cb8a..a75af9024 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C
@@ -292,10 +292,12 @@ fapi2::ReturnCode check_freq_support_vpd<mss::proc_type::AXONE>( const fapi2::Ta
fapi2::VPDInfo<TT::VPD_TARGET_TYPE> l_vpd_info(TT::VPD_BLOB);
const auto& l_vpd_target = mss::find_target<TT::VPD_TARGET_TYPE>(i_target);
+ uint32_t l_omi_freq = 0;
l_vpd_info.iv_is_config_ffdc_enabled = false;
- FAPI_TRY(convert_ddr_freq_to_omi_freq(i_target, i_proposed_freq, l_vpd_info.iv_omi_freq_mhz));
+ FAPI_TRY(convert_ddr_freq_to_omi_freq(i_target, i_proposed_freq, l_omi_freq));
+ l_vpd_info.iv_omi_freq_mhz = l_omi_freq;
FAPI_INF("Setting VPD info OMI frequency: %d Gbps, for DDR frequency %d MT/s",
l_vpd_info.iv_omi_freq_mhz, i_proposed_freq);
diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C
index 8fd3c679b..97f95c7b8 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.C
@@ -156,7 +156,7 @@ fapi_try_exit:
///
bool deconfigure(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
const uint64_t i_dimm_speed,
- const uint32_t i_max_freq)
+ const uint64_t i_max_freq)
{
bool l_is_hw_deconfigured = (i_dimm_speed != i_max_freq);
@@ -174,44 +174,44 @@ bool deconfigure(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
}
///
-/// @brief Selects synchronous mode and performs requirements enforced by selected port frequency
+/// @brief Selects OMI frequency based on selected port frequencies
/// @param[in] i_freq_map dimm speed mapping
/// @param[in] i_equal_dimm_speed tracks whether map has equal dimm speeds
/// @param[in] i_omi_freq OMI frequency
-/// @param[out] o_selected_sync_mode final synchronous mode
-/// @param[out] o_selected_omi_freq final freq selected, only valid if final sync mode is in-sync
+/// @param[out] o_selected_omi_freq final freq selected
/// @return FAPI2_RC_SUCCESS iff successful
///
-fapi2::ReturnCode select_sync_mode(const std::map< fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>, uint64_t >& i_freq_map,
- const speed_equality i_equal_dimm_speed,
- const uint32_t i_omi_freq,
- uint8_t& o_selected_sync_mode,
- uint64_t& o_selected_omi_freq)
+fapi2::ReturnCode select_omi_freq(const std::map< fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>, uint64_t >& i_freq_map,
+ const speed_equality i_equal_dimm_speed,
+ const uint32_t i_omi_freq,
+ uint32_t& o_selected_omi_freq)
{
- FAPI_INF("---- In select_sync_mode ----");
+ FAPI_INF("---- In select_omi_freq ----");
switch(i_equal_dimm_speed)
{
- // If we have a port which has resolved to equal speeds ...
+ // If we resolved to equal speeds ...
case speed_equality::EQUAL_DIMM_SPEEDS:
{
// Return back the resulting speed. It doesn't matter which we select from the map as they're all equal
// If we end up not in sync in the conditional below, thats ok - this parameter is ignored by the
// caller if we're not in sync mode
const auto l_ddr_freq = i_freq_map.begin()->second;
- FAPI_TRY(convert_ddr_freq_to_omi_freq(i_freq_map.begin()->first, l_ddr_freq, o_selected_omi_freq));
+ FAPI_TRY(convert_ddr_freq_to_omi_freq(i_freq_map.begin()->first,
+ l_ddr_freq,
+ o_selected_omi_freq));
// When we selected ATTR_MSS_FREQ, we made sure that we didn't
// select a DIMM freq the OMI couldn't support.
- o_selected_sync_mode = fapi2::ENUM_ATTR_MC_SYNC_MODE_IN_SYNC;
+
+#ifndef __HOSTBOOT_MODULE
// On Cronus if the o_selected_omi_freq != i_omi_freq we've got a mismatch. Note that p9a_mss_freq ensures
// we don't select an invalid freq, but doesn't ensure we select the current OMI freq.
-#ifndef __HOSTBOOT_MODULE
FAPI_ASSERT(o_selected_omi_freq == i_omi_freq,
fapi2::P9A_MSS_FAILED_SYNC_MODE()
.set_OMI_FREQ(i_omi_freq)
.set_MEM_FREQ(o_selected_omi_freq),
- "The DIMM freq (%d) and the OMI freq (%d) don't align",
+ "The OMI freq selected by DIMM speed (%d) and the currently selected OMI freq (%d) don't align",
o_selected_omi_freq, i_omi_freq);
#endif
return fapi2::FAPI2_RC_SUCCESS;
@@ -223,13 +223,14 @@ fapi2::ReturnCode select_sync_mode(const std::map< fapi2::Target<fapi2::TARGET_T
// When we selected ATTR_MSS_FREQ, we made sure that we didn't
// select a DIMM freq the OMI couldn't support. That means that the fastest of the ports
// is the one that rules the roost (the OMI can support it too.) So find that, and set it to
- // the selected frequency. Then deconfigure the slower port (unless we're in Cronus in which
+ // the selected frequency. Then deconfigure the slower ports (unless we're in Cronus in which
// case we just bomb out.)
#ifdef __HOSTBOOT_MODULE
uint64_t l_max_dimm_speed = 0;
fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> l_fastest_port_target = i_freq_map.begin()->first;
std::for_each(i_freq_map.begin(), i_freq_map.end(),
- [&l_max_dimm_speed, &l_fastest_port_target](const std::pair<fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>, uint64_t>& m)
+ [&l_max_dimm_speed, &l_fastest_port_target]
+ (const std::pair<fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>, uint64_t>& m)
{
l_max_dimm_speed = std::max(l_max_dimm_speed, m.second);
l_fastest_port_target = m.first;
@@ -241,15 +242,16 @@ fapi2::ReturnCode select_sync_mode(const std::map< fapi2::Target<fapi2::TARGET_T
deconfigure(m.first, m.second, l_max_dimm_speed);
});
- o_selected_sync_mode = fapi2::ENUM_ATTR_MC_SYNC_MODE_IN_SYNC;
- FAPI_TRY(convert_ddr_freq_to_omi_freq(l_fastest_port_target, l_max_dimm_speed, o_selected_omi_freq));
+ FAPI_TRY(convert_ddr_freq_to_omi_freq(l_fastest_port_target,
+ l_max_dimm_speed,
+ o_selected_omi_freq));
return fapi2::FAPI2_RC_SUCCESS;
#else
// Cronus only
FAPI_ASSERT(false,
fapi2::P9A_MSS_FAILED_SYNC_MODE()
.set_OMI_FREQ(i_omi_freq),
- "DIMM speeds differ from OMI speed %d", i_omi_freq);
+ "Some DIMM speeds are incompatible with OMI speed %d", i_omi_freq);
#endif
break;
}
diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.H b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.H
index 06345713c..e05415523 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.H
+++ b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_sync.H
@@ -43,6 +43,7 @@
#include <mss_generic_attribute_getters.H>
#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
#include <lib/shared/axone_consts.H>
+#include <lib/freq/axone_freq_traits.H>
#include <generic/memory/lib/utils/freq/mss_freq_scoreboard.H>
#include <generic/memory/lib/utils/c_str.H>
#include <generic/memory/lib/utils/mss_math.H>
@@ -99,18 +100,19 @@ fapi_try_exit:
///
inline fapi2::ReturnCode convert_ddr_freq_to_omi_freq(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
const uint64_t i_ddr_freq,
- uint64_t& o_omi_freq)
+ uint32_t& o_omi_freq)
{
using TT = mss::frequency_traits<mss::proc_type::AXONE>;
constexpr uint64_t ROUND_UNITS = 10;
+ uint64_t l_omi_freq = 0;
// Get the OMI to DDR freq ratio
uint8_t l_ratio[TT::MAX_DIMM_PER_PORT] = {0};
FAPI_TRY(mss::attr::get_host_to_ddr_speed_ratio(i_target, l_ratio));
// Multiply by the ratio and round to the nearest 10GBPS
- FAPI_TRY(mss::divide_and_round((i_ddr_freq * l_ratio[0]), ROUND_UNITS, o_omi_freq));
- o_omi_freq *= ROUND_UNITS;
+ FAPI_TRY(mss::divide_and_round((i_ddr_freq * l_ratio[0]), ROUND_UNITS, l_omi_freq));
+ o_omi_freq = ROUND_UNITS * l_omi_freq;
FAPI_DBG("For ratio %d and DDR freq %d, corresponding OMI freq is %d", l_ratio[0], i_ddr_freq, o_omi_freq);
fapi_try_exit:
@@ -125,7 +127,7 @@ fapi_try_exit:
/// @return FAPI2_RC_SUCCESS iff successful
///
inline fapi2::ReturnCode convert_omi_freq_to_ddr_freq(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
- const uint64_t i_omi_freq,
+ const uint32_t i_omi_freq,
uint64_t& o_ddr_freq)
{
using TT = mss::frequency_traits<mss::proc_type::AXONE>;
@@ -134,7 +136,7 @@ inline fapi2::ReturnCode convert_omi_freq_to_ddr_freq(const fapi2::Target<fapi2:
uint8_t l_ratio[TT::MAX_DIMM_PER_PORT] = {0};
FAPI_TRY(mss::attr::get_host_to_ddr_speed_ratio(i_target, l_ratio));
- FAPI_TRY(mss::divide_and_round(i_omi_freq, static_cast<uint64_t>(l_ratio[0]), o_ddr_freq),
+ FAPI_TRY(mss::divide_and_round(static_cast<uint64_t>(i_omi_freq), static_cast<uint64_t>(l_ratio[0]), o_ddr_freq),
"%s freq system saw a zero Host (OMI) to DDR frequency ratio", mss::c_str(i_target));
FAPI_DBG( "For ratio %d and OMI freq %d, corresponding DDR freq is %d", l_ratio[0], i_omi_freq, o_ddr_freq);
@@ -143,26 +145,6 @@ fapi_try_exit:
}
///
-/// @brief Checks to see if a passed in value could be a valid OMI frequency
-/// @param[in] i_target the port target
-/// @param[in] i_proposed_freq a frequency value that is to be checked
-/// @param[out] o_valid boolean whether the value is a valid OMI frequency
-/// @return FAPI2_RC_SUCCESS iff successful
-///
-inline fapi2::ReturnCode is_omi_freq_valid (const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
- const uint64_t i_proposed_freq,
- uint64_t& o_valid)
-{
- uint64_t l_proposed_omi_freq = 0;
- FAPI_TRY(convert_ddr_freq_to_omi_freq(i_target, i_proposed_freq, l_proposed_omi_freq));
-
- o_valid = std::binary_search(AXONE_OMI_FREQS.begin(), AXONE_OMI_FREQS.end(), l_proposed_omi_freq);
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
/// @brief Retrieves a mapping of MSS frequency values per port target
/// @param[in] i_targets vector of port targets
/// @param[out] o_freq_map dimm speed map <key, value> = (port target, frequency)
@@ -182,22 +164,20 @@ fapi2::ReturnCode dimm_speed_map(const std::vector< fapi2::Target<fapi2::TARGET_
///
bool deconfigure(const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target,
const uint64_t i_dimm_speed,
- const uint32_t i_omi_freq);
+ const uint64_t i_omi_freq);
///
-/// @brief Selects synchronous mode and performs requirements enforced by selected port frequency
+/// @brief Selects OMI frequency based on selected port frequencies
/// @param[in] i_freq_map dimm speed mapping
/// @param[in] i_equal_dimm_speed tracks whether map has equal dimm speeds
/// @param[in] i_omi_freq OMI frequency
-/// @param[out] o_selected_sync_mode final synchronous mode
-/// @param[out] o_selected_omi_freq final freq selected, only valid if final sync mode is in-sync
+/// @param[out] o_selected_omi_freq final freq selected
/// @return FAPI2_RC_SUCCESS iff successful
///
-fapi2::ReturnCode select_sync_mode(const std::map< fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>, uint64_t >& i_freq_map,
- const speed_equality i_equal_dimm_speed,
- const uint32_t i_omi_freq,
- uint8_t& o_selected_sync_mode,
- uint64_t& o_selected_omi_freq);
+fapi2::ReturnCode select_omi_freq(const std::map< fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>, uint64_t >& i_freq_map,
+ const speed_equality i_equal_dimm_speed,
+ const uint32_t i_omi_freq,
+ uint32_t& o_selected_omi_freq);
}// mss
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
index 49c7c4e56..3bbf0ea9f 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
@@ -64,7 +64,7 @@ fapi2::ReturnCode p9a_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MEM
{
uint8_t l_dimm_index = 0;
uint64_t l_freq = 0;
- uint64_t l_omi_freq = 0;
+ uint32_t l_omi_freq = 0;
FAPI_TRY( mss::attr::get_freq(mss::find_target<fapi2::TARGET_TYPE_MEM_PORT>(dimm), l_freq) );
FAPI_TRY( mss::convert_ddr_freq_to_omi_freq(mss::find_target<fapi2::TARGET_TYPE_MEM_PORT>(dimm), l_freq, l_omi_freq));
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C
index cc23976d8..adddd1ca2 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -35,13 +35,59 @@
// fapi2
#include <p9a_mss_freq_system.H>
+#include <lib/freq/axone_sync.H>
+#include <generic/memory/lib/utils/find.H>
+#include <generic/memory/lib/utils/count_dimm.H>
+extern "C"
+{
///
/// @brief Matches OMI freq with DDR freq
-/// @param[in] i_target controller (e.g. MC)
+/// @param[in] i_target PROC_CHIP target
/// @return FAPI2_RC_SUCCESS iff ok
///
-fapi2::ReturnCode p9a_mss_freq_system( const fapi2::Target<fapi2::TARGET_TYPE_MC>& i_target )
-{
- return fapi2::FAPI2_RC_SUCCESS;
-}
+ fapi2::ReturnCode p9a_mss_freq_system( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target )
+ {
+ const auto& l_ports = mss::find_targets<fapi2::TARGET_TYPE_MEM_PORT>(i_target);
+
+ // If there are no DIMM we don't need to bother. In fact, we can't as we didn't setup
+ // attributes for the PHY, etc. If there is even one DIMM on this proc,
+ // we do the right thing.
+ if (mss::count_dimm(l_ports) == 0)
+ {
+ FAPI_INF("... skipping freq_system - no DIMM ...");
+ return fapi2::FAPI2_RC_SUCCESS;
+ }
+
+ std::map< fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>, uint64_t > l_freq_map;
+ uint32_t l_omi_freq = 0;
+ uint32_t l_selected_omi_freq = 0;
+ mss::speed_equality l_equal_dimm_speed;
+
+ // Get OMI freq
+ FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_FREQ_OMI_MHZ, i_target, l_omi_freq) );
+
+ FAPI_INF("Retrieved omi freq %d", l_omi_freq);
+
+ // Populate dimm speed map
+ FAPI_TRY( mss::dimm_speed_map(l_ports, l_freq_map, l_equal_dimm_speed),
+ "Failed to get dimm speed mapping" );
+
+ FAPI_INF("Dimm speed for all OCMBs are the same : %s",
+ uint8_t(l_equal_dimm_speed) ? "true" : "false");
+
+ // Select OMI freq, or check in the case of Cronus
+ FAPI_TRY( mss::select_omi_freq(l_freq_map,
+ l_equal_dimm_speed,
+ l_omi_freq,
+ l_selected_omi_freq) );
+
+ // Set attributes.
+ FAPI_INF("%s: Setting recommended OMI frequency in ATTR_FREQ_OMI_MHZ to %d", mss::c_str(i_target), l_selected_omi_freq);
+ FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_FREQ_OMI_MHZ, i_target, l_selected_omi_freq) );
+
+ fapi_try_exit:
+ return fapi2::current_err;
+ }
+
+} //extern "C"
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H
index cbf2d718c..31389feff 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -39,17 +39,17 @@
#include <fapi2.H>
#include <vector>
-typedef fapi2::ReturnCode (*p9a_mss_freq_system_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_MC>&);
+typedef fapi2::ReturnCode (*p9a_mss_freq_system_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
extern "C"
{
///
/// @brief Matches OMI freq with DDR freq
- /// @param[in] i_target controller (e.g. MC)
+ /// @param[in] i_target PROC_CHIP target
/// @return FAPI2_RC_SUCCESS iff ok
///
- fapi2::ReturnCode p9a_mss_freq_system(const fapi2::Target<fapi2::TARGET_TYPE_MC>& i_target);
+ fapi2::ReturnCode p9a_mss_freq_system(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
}
#endif
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.mk b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.mk
index 2e399418e..baacd38d6 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.mk
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_freq_system.mk
@@ -5,7 +5,7 @@
#
# OpenPOWER HostBoot Project
#
-# Contributors Listed Below - COPYRIGHT 2018
+# Contributors Listed Below - COPYRIGHT 2018,2019
# [+] International Business Machines Corp.
#
#
@@ -27,5 +27,5 @@
-include 00p9a_common.mk
PROCEDURE=p9a_mss_freq_system
-$(eval $(call ADD_MEMORY_INCDIRS,$(PROCEDURE)))
+$(eval $(call ADD_P9A_MEMORY_INCDIRS,$(PROCEDURE)))
$(call BUILD_PROCEDURE)
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