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authorMark Pizzutillo <Mark.Pizzutillo@ibm.com>2019-09-03 12:55:26 -0400
committerNicholas E Bofferding <bofferdn@us.ibm.com>2019-09-14 08:05:02 -0500
commit7a27f4603a1b222e2d527d1167e5a3c3653c404b (patch)
tree357a894034f2958fa13fcbbe38e87c608ca72dbc /src/import/chips/p9a/procedures/hwp/memory
parent1434b8952e3a2dbd55a0876ec9d89fe3ffd21da6 (diff)
downloadtalos-hostboot-7a27f4603a1b222e2d527d1167e5a3c3653c404b.tar.gz
talos-hostboot-7a27f4603a1b222e2d527d1167e5a3c3653c404b.zip
Add ekb dual drop support for p9a
SPD and VPD will need to be revisited once we architect how this will work from the Cronus and HB side. In the meantime, we pass EKB unit tests so we are on the right track. Change-Id: Ie4516339dcc6e43ee1e6dd7aaaa9589fbfcace89 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83218 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/83436 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9a/procedures/hwp/memory')
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C4
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C25
2 files changed, 14 insertions, 15 deletions
diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C
index d4c280c2f..1a66aa77a 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_mss_freq.C
@@ -286,9 +286,9 @@ fapi2::ReturnCode check_freq_support_vpd<mss::proc_type::AXONE>( const fapi2::Ta
continue;
}
- l_vpd_info.iv_rank = l_rank.get_port_rank();
+ l_vpd_info.iv_rank = l_rank.get_dimm_rank();
FAPI_INF("%s. VPD info - checking rank: %d",
- mss::c_str(i_target), l_rank.get_port_rank());
+ mss::c_str(i_target), l_rank.get_dimm_rank());
// Check if this VPD configuration is supported
FAPI_TRY(is_vpd_config_supported<mss::proc_type::AXONE>(l_vpd_target, i_proposed_freq, l_vpd_info, o_supported),
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
index 9210684d1..7a62e36a0 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
@@ -33,9 +33,11 @@
// *HWP Level: 1
// *HWP Consumed by: FSP:HB
-// fapi2
#include <fapi2.H>
#include <p9a_mss_eff_config.H>
+#include <lib/shared/exp_defaults.H>
+#include <lib/dimm/exp_rank.H>
+#include <generic/memory/lib/utils/mss_rank.H>
#include <generic/memory/lib/data_engine/data_engine.H>
#include <generic/memory/lib/utils/find.H>
#include <generic/memory/lib/spd/ddimm/efd_factory.H>
@@ -57,25 +59,22 @@
///
fapi2::ReturnCode p9a_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_target )
{
- mss::display_git_commit_info("p9a_mss_eff_config");
-
- // Workaround until DIMM level attrs work
- uint8_t l_ranks[mss::exp::MAX_DIMM_PER_PORT] = {};
+ using mss::DEFAULT_MC_TYPE;
- FAPI_TRY( mss::attr::get_num_master_ranks_per_dimm(i_target, l_ranks) );
+ mss::display_git_commit_info("p9a_mss_eff_config");
for(const auto& dimm : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target))
{
- uint8_t l_dimm_index = 0;
uint64_t l_freq = 0;
uint32_t l_omi_freq = 0;
- FAPI_TRY( mss::attr::get_freq(mss::find_target<fapi2::TARGET_TYPE_MEM_PORT>(dimm), l_freq) );
- FAPI_TRY( mss::convert_ddr_freq_to_omi_freq(mss::find_target<fapi2::TARGET_TYPE_MEM_PORT>(dimm), l_freq, l_omi_freq));
+ FAPI_TRY( mss::attr::get_freq(i_target, l_freq) );
+ FAPI_TRY( mss::convert_ddr_freq_to_omi_freq(i_target, l_freq, l_omi_freq));
- // Quick hack to get the index until DIMM level attrs work
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_REL_POS, dimm, l_dimm_index) );
+ // Get ranks via rank API
+ std::vector<mss::rank::info<>> l_ranks;
+ mss::rank::ranks_on_dimm(dimm, l_ranks);
- for( auto rank = 0; rank < l_ranks[l_dimm_index]; ++rank )
+ for (const auto& l_rank : l_ranks)
{
std::shared_ptr<mss::efd::base_decoder> l_efd_data;
@@ -83,7 +82,7 @@ fapi2::ReturnCode p9a_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MEM
const auto l_ocmb = mss::find_target<fapi2::TARGET_TYPE_OCMB_CHIP>(i_target);
fapi2::MemVpdData_t l_vpd_type(fapi2::MemVpdData::EFD);
fapi2::VPDInfo<fapi2::TARGET_TYPE_OCMB_CHIP> l_vpd_info(l_vpd_type);
- l_vpd_info.iv_rank = rank;
+ l_vpd_info.iv_rank = l_rank.get_dimm_rank();
l_vpd_info.iv_omi_freq_mhz = l_omi_freq;
FAPI_TRY( fapi2::getVPD(l_ocmb, l_vpd_info, nullptr), "failed getting VPD size from getVPD" );
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