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author | Alvin Wang <wangat@tw.ibm.com> | 2019-01-14 00:18:01 -0600 |
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committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2019-02-13 12:57:03 -0600 |
commit | 2206846076da737cb4f4a7e8ae66bf57d5d37bc3 (patch) | |
tree | 2fca8fbfb2f983ea19e98fa05b5608eb99f7ac27 /src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train_check.C | |
parent | c1549db07fe83367f558aff0fa75fdbc3a14dee8 (diff) | |
download | talos-hostboot-2206846076da737cb4f4a7e8ae66bf57d5d37bc3.tar.gz talos-hostboot-2206846076da737cb4f4a7e8ae66bf57d5d37bc3.zip |
Adds p9a_omi_train procedure(START)
Change-Id: Iafa88363b862e9175982836f1686199e9366d555
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69721
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69872
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train_check.C')
-rw-r--r-- | src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train_check.C | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train_check.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train_check.C index 56f6acd89..cc9d8008d 100644 --- a/src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train_check.C +++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_omi_train_check.C @@ -22,3 +22,84 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file p9a_omi_train_check.C +/// @brief Check the omi status +/// +// *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 3 +// *HWP Consumed by: Memory + +#include <p9a_omi_train_check.H> + +#include <fapi2.H> +#include <p9a_mc_scom_addresses.H> +#include <p9a_mc_scom_addresses_fld.H> +#include <generic/memory/lib/utils/c_str.H> +#include <generic/memory/lib/utils/scom.H> +#include <generic/memory/lib/utils/buffer_ops.H> +#include <generic/memory/lib/utils/shared/mss_generic_consts.H> +#include <lib/mc/omi.H> + +/// +/// @brief Check the omi status in Axone side +/// @param[in] i_target the OMIC target to operate on +/// @return FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode p9a_omi_train_check( const fapi2::Target<fapi2::TARGET_TYPE_OMI>& i_target) +{ + FAPI_INF("%s Start p9a_omi_train_check", mss::c_str(i_target)); + + // Const + constexpr uint8_t STATE_MACHINE_SUCCESS = 0b111; // This value is from Lonny Lambrecht + constexpr uint8_t MAX_LOOP_COUNT = 20; // Retry times + + // Declares variables + fapi2::buffer<uint64_t> l_omi_status; + fapi2::buffer<uint64_t> l_omi_training_status; + uint8_t l_state_machine_state = 0; + uint8_t l_tries = 0; + + FAPI_TRY(mss::mc::omi_train_status(i_target, l_state_machine_state, l_omi_status)); + + while (l_tries < MAX_LOOP_COUNT && l_state_machine_state != STATE_MACHINE_SUCCESS) + { + // Delay + fapi2::delay(mss::DELAY_100US, 10 * mss::DELAY_1MS); + + // Check OMI training status + FAPI_TRY(mss::mc::omi_train_status(i_target, l_state_machine_state, l_omi_status)); + // Note: this is very useful debug information while trying to debug training during polling + FAPI_TRY(mss::getScom(i_target, P9A_MC_REG2_DL0_TRAINING_STATUS, l_omi_training_status)); + l_tries++; + } + + FAPI_TRY(mss::getScom(i_target, P9A_MC_REG2_DL0_TRAINING_STATUS, l_omi_training_status)); + FAPI_ASSERT(l_state_machine_state == STATE_MACHINE_SUCCESS, + fapi2::P9A_OMI_TRAIN_ERR() + .set_TARGET(i_target) + .set_EXPECTED_SM_STATE(STATE_MACHINE_SUCCESS) + .set_ACTUAL_SM_STATE(l_state_machine_state) + .set_DL0_STATUS(l_omi_status) + .set_DL0_TRAINING_STATUS(l_omi_training_status), + "%s OMI Training Failure, expected state:%d/actual state:%d", + mss::c_str(i_target), + STATE_MACHINE_SUCCESS, + l_state_machine_state + ); + + FAPI_INF("%s End p9a_omi_train_check, expected state:%d/actual state:%d, DL0_STATUS:0x%016llx, DL0_TRAINING_STATUS:0x%016llx", + mss::c_str(i_target), + STATE_MACHINE_SUCCESS, + l_state_machine_state, + l_omi_status, + l_omi_training_status); + return fapi2::FAPI2_RC_SUCCESS; + +fapi_try_exit: + return fapi2::current_err; + +}// p9a_omi_train_check |