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| author | Louis Stermole <stermole@us.ibm.com> | 2019-12-16 10:16:07 -0500 |
|---|---|---|
| committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2020-01-29 15:05:28 -0600 |
| commit | 6b29b3829fc9ff676662c4e520c13ded41d070fd (patch) | |
| tree | 2a6ad0b08c4d97d6e1d5111b9135f4ebb8ca9eaf /src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H | |
| parent | 1a19ea2ae50c02e3cc76004fb9b8a79f6b8f7182 (diff) | |
| download | talos-hostboot-6b29b3829fc9ff676662c4e520c13ded41d070fd.tar.gz talos-hostboot-6b29b3829fc9ff676662c4e520c13ded41d070fd.zip | |
Change p9a_mss_freq to work on PROC_CHIP target
Previously p9a_mss_freq ran on the MEM_PORT target, even though
the freq domain is at the PROC_CHIP level. This change will allow
DDIMMs to be binned to the same freq across the domain.
Also removes a lot of FAPI_INF messages to reduce UT log size.
Change-Id: I7d4e2ee8897fdd62c0672d96cc1731c7a14643dd
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/88736
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Dev-Ready: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/89672
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H')
| -rw-r--r-- | src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H index 1b4f96d0c..3c21636fc 100644 --- a/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H +++ b/src/import/chips/p9a/procedures/hwp/memory/lib/freq/axone_freq_traits.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2019 */ +/* Contributors Listed Below - COPYRIGHT 2019,2020 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -56,14 +56,15 @@ class frequency_traits<mss::proc_type::AXONE> ////////////////////////////////////////////////////////////// static constexpr fapi2::TargetType PORT_TARGET_TYPE = fapi2::TARGET_TYPE_MEM_PORT; static constexpr fapi2::TargetType FREQ_TARGET_TYPE = fapi2::TARGET_TYPE_MEM_PORT; + static constexpr fapi2::TargetType FREQ_DOMAIN_TARGET_TYPE = fapi2::TARGET_TYPE_PROC_CHIP; static constexpr fapi2::TargetType VPD_TARGET_TYPE = fapi2::TARGET_TYPE_OCMB_CHIP; ////////////////////////////////////////////////////////////// // Traits values ////////////////////////////////////////////////////////////// static const std::vector<uint64_t> SUPPORTED_FREQS; - // MEM_PORT is our frequency domain. So 1 port per domain - static constexpr uint64_t PORTS_PER_FREQ_DOMAIN = 1; + // PROC_CHIP is our frequency domain + static constexpr uint64_t PORTS_PER_FREQ_DOMAIN = 16; // Max DIMM's per port static constexpr uint64_t MAX_DIMM_PER_PORT = 2; // Maxium number of primary ranks on a DIMM |
