Risk level 3/4/5 support: Step 1 - backward compatibility and v6 image

- Introducing RV_RL3/4/5 ring variant (RV) support for EC/EQ chiplets.
- Dropping RV support for all chiplet's instance rings which saves 456
  Quad bytes and 58 Nest bytes in Seeprom's TOR slots (compared to
  master).
- Each additional risk level adds 144 bytes in Seeprom TOR slots.
- Various changes to data names associated with ring variants to
  clarify that the notion of ring variants is now specific only to
  Common rings while Instance rings only have the BASE variant.
- Also, removed backwards compatibility to TOR v5, i.e. from before
  we introduced RL2 in february. Assumption is that all images/drivers
  used in fips910/920 and OP920 are TOR v6.
- This commit produces a TOR v6 image to ensure EKB FSP CI success.

Key_Cronus_Test=XIP_REGRESS

Change-Id: Icfcb1e68fd74a10ffc48ee7a5da528a8042ef3b1
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56973
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Kahn C. Evans <kahnevan@us.ibm.com>
Reviewed-by: James N. Klazynski <jklazyns@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56983
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 107 insertions, 69 deletions

diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index 2132d7878..9e69a33b8 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -2904,13 +2904,26 @@ fapi2::ReturnCode layoutRingsForCME( Homerlayout_t*   i_pHomer,
                          i_debugMode );
 
     // get all the rings pertaining to CME in a work buffer first.
-    if( i_riskLevel == 0x1 )
+    switch (i_riskLevel)
     {
-        l_ringVariant = RV_RL;
-    }
-    else if ( i_riskLevel == 0x2 )
-    {
-        l_ringVariant = RV_RL2;
+        case 0x1:
+            l_ringVariant = RV_RL;
+            break;
+        case 0x2:
+            l_ringVariant = RV_RL2;
+            break;
+        case 0x3:
+            l_ringVariant = RV_RL3;
+            break;
+        case 0x4:
+            l_ringVariant = RV_RL4;
+            break;
+        case 0x5:
+            l_ringVariant = RV_RL5;
+            break;
+        default:
+            // Default to RV_BASE
+            break;
     }
 
     ringLength  =  SWIZZLE_4_BYTE(pCmeHdr->g_cme_pstate_region_offset) + SWIZZLE_4_BYTE(
@@ -3373,14 +3386,27 @@ fapi2::ReturnCode layoutRingsForSGPE( Homerlayout_t*     i_pHomer,
     if( i_imgType.sgpeHcodeBuild )
     {
 
-        // get all the rings pertaining to CME in a work buffer first.
-        if( i_riskLevel == 0x1 )
+        // get all the rings pertaining to SGPE in a work buffer first.
+        switch (i_riskLevel)
         {
-            l_ringVariant = RV_RL;
-        }
-        else if ( i_riskLevel == 0x2 )
-        {
-            l_ringVariant = RV_RL2;
+            case 0x1:
+                l_ringVariant = RV_RL;
+                break;
+            case 0x2:
+                l_ringVariant = RV_RL2;
+                break;
+            case 0x3:
+                l_ringVariant = RV_RL3;
+                break;
+            case 0x4:
+                l_ringVariant = RV_RL4;
+                break;
+            case 0x5:
+                l_ringVariant = RV_RL5;
+                break;
+            default:
+                // Default to RV_BASE
+                break;
         }
 
         //Manage the Quad Common rings in HOMER
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
index 8ec0fb225..92942e480 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pervasive_attributes.xml
@@ -210,7 +210,7 @@
   <description>HWP/Init "risk level" enabled. Used by HB to pass to HB driven
       HWPs</description>
   <valueType>uint8</valueType>
-  <enum>RL0 = 0x0,RL1 = 0x1,RL2 = 0x2</enum>
+  <enum>RL0 = 0x0,RL1 = 0x1,RL2 = 0x2,RL3 = 0x3,RL4 = 0x4, RL5 = 0x5</enum>
   <persistRuntime/>
   <platInit/>
 </attribute>
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.C b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
index cd99875f1..0cf933891 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
@@ -61,7 +61,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"perv_repr"             , 0x13, 0x01, 0x01, VPD_RING    , 0x01034006},
     {"occ_repr"              , 0x14, 0x01, 0x01, VPD_RING    , 0x01030806},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -85,7 +85,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"n0_nx_repr"          , 0x0a, 0x02, 0x02, VPD_RING    , 0x02032006},
     {"n0_cxa0_repr"        , 0x0b, 0x02, 0x02, VPD_RING    , 0x02031006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT};
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -113,7 +113,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"n1_ioo1_repr"        , 0x0e, 0x03, 0x03, VPD_RING    , 0x03030406},
     {"n1_mcs23_repr"       , 0x0f, 0x03, 0x03, VPD_RING    , 0x03030206},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT};
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -137,7 +137,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"n2_cxa1_repr"        , 0x0a, 0x04, 0x04, VPD_RING    , 0x04032006},
     {"n2_psi_repr"         , 0x0b, 0x04, 0x04, VPD_RING    , 0x04030206},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -162,7 +162,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"n3_mcs01_repr"       , 0x0b, 0x05, 0x05, VPD_RING    , 0x05030106},
     {"n3_np_repr"          , 0x0c, 0x05, 0x05, VPD_RING    , 0x05030806},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -193,7 +193,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"xb_io1_repr"         , 0x15, 0x06, 0x06, VPD_RING    , 0x06031106},
     {"xb_io2_repr"         , 0x16, 0x06, 0x06, VPD_RING    , 0x06030886},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -224,7 +224,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"mc_iom01_repr"       , 0x11, 0x07, 0x08, VPD_RING    , 0x07031006},
     {"mc_iom23_repr"       , 0x12, 0x07, 0x08, VPD_RING    , 0x07030806},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -244,7 +244,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"ob0_repr"              , 0x07, 0x09, 0x09, VPD_RING    , 0x09037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -264,7 +264,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"ob1_repr"              , 0x07, 0x0a, 0x0a, VPD_RING    , 0x0A037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -284,7 +284,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"ob2_repr"              , 0x07, 0x0b, 0x0b, VPD_RING    , 0x0B037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -304,7 +304,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"ob3_repr"              , 0x07, 0x0c, 0x0c, VPD_RING    , 0x0C037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -322,7 +322,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"pci0_repr"           , 0x05, 0x0d, 0x0d, VPD_RING    , 0x0D037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -340,7 +340,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"pci1_repr"           , 0x05, 0x0e, 0x0e, VPD_RING    , 0x0E037806},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -358,7 +358,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"pci2_repr"           , 0x05, 0x0F, 0x0F, VPD_RING    , 0x0F037C06},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -441,7 +441,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"ex_l3_refr_repr"            , 0x45, 0x10, 0x1b, VPD_RING    , 0x10030046},
     {"ex_l3_refr_time"            , 0x46, 0x10, 0x1b, VPD_RING    , 0x10030047},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2 };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2, RV_RL3, RV_RL4, RV_RL5 };
 };
 
 
@@ -460,7 +460,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     { "ec_repr"            , 0x05, 0x20, 0x37, VPD_RING    , 0x20037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2 };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2, RV_RL3, RV_RL4, RV_RL5 };
 };
 
 
@@ -480,7 +480,7 @@ void P9_RID::ringid_get_chiplet_properties(
     GenRingIdList**    o_ringComm,
     GenRingIdList**    o_ringInst,
     RingVariantOrder** o_varOrder,
-    uint8_t*           o_varNumb)
+    uint8_t*           o_numVariants)
 {
     switch (i_chipletType)
     {
@@ -489,7 +489,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    PERV::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    PERV::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) PERV::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case N0_TYPE :
@@ -497,7 +497,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    N0::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    N0::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) N0::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case N1_TYPE :
@@ -505,7 +505,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    N1::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    N1::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) N1::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case N2_TYPE :
@@ -513,7 +513,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    N2::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    N2::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) N2::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case N3_TYPE :
@@ -521,7 +521,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    N3::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    N3::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) N3::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case XB_TYPE :
@@ -529,7 +529,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    XB::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    XB::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) XB::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case MC_TYPE :
@@ -537,7 +537,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    MC::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    MC::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) MC::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case OB0_TYPE :
@@ -545,7 +545,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    OB0::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    OB0::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) OB0::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case OB1_TYPE :
@@ -553,7 +553,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    OB1::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    OB1::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) OB1::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case OB2_TYPE :
@@ -561,7 +561,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    OB2::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    OB2::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) OB2::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case OB3_TYPE :
@@ -569,7 +569,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    OB3::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    OB3::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) OB3::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case PCI0_TYPE :
@@ -577,7 +577,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    PCI0::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    PCI0::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) PCI0::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case PCI1_TYPE :
@@ -585,7 +585,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    PCI1::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    PCI1::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) PCI1::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case PCI2_TYPE :
@@ -593,7 +593,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    PCI2::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    PCI2::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) PCI2::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case EQ_TYPE :
@@ -601,7 +601,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    EQ::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    EQ::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) EQ::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         case EC_TYPE :
@@ -609,7 +609,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = (GenRingIdList*)    EC::RING_ID_LIST_COMMON;
             *o_ringInst = (GenRingIdList*)    EC::RING_ID_LIST_INSTANCE;
             *o_varOrder = (RingVariantOrder*) EC::RING_VARIANT_ORDER;
-            *o_varNumb  = (*(*o_cpltData)).iv_num_ring_variants;
+            *o_numVariants  = (*(*o_cpltData)).iv_num_common_ring_variants;
             break;
 
         default :
@@ -617,7 +617,7 @@ void P9_RID::ringid_get_chiplet_properties(
             *o_ringComm = NULL;
             *o_ringInst = NULL;
             *o_varOrder = NULL;
-            *o_varNumb = 0;
+            *o_numVariants = 0;
             break;
     }
 }
@@ -627,12 +627,12 @@ GenRingIdList* P9_RID::_ringid_get_ring_list(RingId_t i_ringId)
     ChipletData_t*    l_cpltData;
     GenRingIdList*    l_ringList[2];    // 0: common, 1: instance
     RingVariantOrder* l_varOrder;
-    uint8_t           l_varNumb;
+    uint8_t           l_numVariants;
     int               i, j, n;
 
     P9_RID::ringid_get_chiplet_properties(
         P9_RID::ringid_get_chiplet(i_ringId),
-        &l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_varNumb);
+        &l_cpltData, &l_ringList[0], &l_ringList[1], &l_varOrder, &l_numVariants);
 
     if (!l_ringList[0])
     {
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
index d6cbb5c50..a67c89fdd 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
@@ -214,7 +214,7 @@ static const ChipletData_t g_chipletData =
     19, // 19 common rings for pervasive chiplet
     2,  // 2 instance specific rings for pervasive chiplet
     2,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 }; // end of namespace PERV
 
@@ -244,7 +244,7 @@ static const ChipletData_t g_chipletData =
     9,  // 9 common rings for N0 Chiplet
     3,  // 3 instance specific rings for N0 chiplet
     3,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 };
 
@@ -278,7 +278,7 @@ static const ChipletData_t g_chipletData =
     12, // 12 common rings for N1 Chiplet
     4,  // 4 instance specific rings for N1 chiplet
     4,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 };
 
@@ -308,7 +308,7 @@ static const ChipletData_t g_chipletData =
     9, // 9 common rings for N2 Chiplet
     3, // 3 instance specific rings for N2 chiplet
     3,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 };
 
@@ -339,7 +339,7 @@ static const ChipletData_t g_chipletData =
     10,// 10 common rings for N3 Chiplet
     3, // 3 instance specific rings for N3 chiplet
     3,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 };
 
@@ -376,7 +376,7 @@ static const ChipletData_t g_chipletData =
     15, // 15 common rings for X-Bus Chiplet
     4,  // 4 instance specific rings for XB chiplet
     4,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 }; // end of namespace XB
 
@@ -414,7 +414,7 @@ static const ChipletData_t g_chipletData =
     16, // 16 common rings for MC Chiplet
     3,  // 3 instance specific rings for each MC instance
     3,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 }; // end of namespace MC
 
@@ -441,7 +441,7 @@ static const ChipletData_t g_chipletData =
     7,  // 7 common rings for OB Chiplet
     1,  // 1 instance specific rings for each OB chiplet
     1,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 }; // end of namespace OB0
 
@@ -468,7 +468,7 @@ static const ChipletData_t g_chipletData =
     7,  // 7 common rings for OB Chiplet
     1,  // 1 instance specific rings for each OB chiplet
     1,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 }; // end of namespace OB1
 
@@ -496,7 +496,7 @@ static const ChipletData_t g_chipletData =
     7,  // 7 common rings for OB Chiplet
     1,  // 1 instance specific rings for each OB chiplet
     1,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 }; // end of namespace OB2
 
@@ -523,7 +523,7 @@ static const ChipletData_t g_chipletData =
     7,  // 7 common rings for OB Chiplet
     1,  // 1 instance specific rings for each OB chiplet
     1,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 }; // end of namespace OB2
 
@@ -547,7 +547,7 @@ static const ChipletData_t g_chipletData =
     5,  // 5 common rings for PCI0 chiplet
     1,  // 1 instance specific rings for PCI0 chiplet
     1,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 };
 
@@ -571,7 +571,7 @@ static const ChipletData_t g_chipletData =
     5,  // 5 common rings for PCI1 chiplet
     1,  // 1 instance specific rings for PCI1 chiplet
     1,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 };
 
@@ -595,7 +595,7 @@ static const ChipletData_t g_chipletData =
     5,  // 5 common rings for PCI2 chiplet
     1,  // 1 instance specific rings for PCI2 chiplet
     1,
-    2,  // 2 ring variants: BASE, RL
+    2,  // 2 common ring variants: BASE, RL
 };
 };
 
@@ -686,7 +686,7 @@ static const ChipletData_t g_chipletData =
     66, // 66 common rings for Quad chiplet.
     5,  // 5 instance specific rings for each EQ chiplet
     9,  // 9 different rings since 2 per EX ring and 1 per EQ
-    4,  // 4 ring variants: BASE, CC, RL, RL2
+    7,  // 7 common ring variants: BASE, CC, RL, RL2/3/4/5
 };
 }; // end of namespace EQ
 
@@ -711,7 +711,7 @@ static const ChipletData_t g_chipletData =
     6,  // 6 common rings for Core chiplet
     1,  // 1 instance specific ring for each Core chiplet
     1,
-    4,  // 4 ring variants: BASE, CC, RL, RL2
+    7,  // 7 common ring variants: BASE, CC, RL, RL2/3/4/5
 };
 }; // end of namespace EC
 
@@ -1257,7 +1257,7 @@ ringid_get_chiplet_properties(
     GenRingIdList**    o_ringComm,
     GenRingIdList**    o_ringInst,
     RingVariantOrder** o_varOrder,
-    uint8_t*           o_varNumb);
+    uint8_t*           o_numVariants);
 
 // Returns properties of a ring as determined by ringId
 GenRingIdList*
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C
index 771f026ff..010a1cd93 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C
@@ -54,6 +54,7 @@ int get_ring_from_ring_section( void*           i_ringSection,     // Ring secti
     uint8_t           iInst, iRing, iVariant;
     TorHeader_t*      torHeader;
     uint32_t          torMagic;
+    uint8_t           torVersion;
     uint8_t           chipType;
     TorCpltBlock_t*   cpltBlock;
     TorCpltOffset_t   cpltOffset; // Offset from ringSection to chiplet section
@@ -73,6 +74,7 @@ int get_ring_from_ring_section( void*           i_ringSection,     // Ring secti
 
     torHeader = (TorHeader_t*)i_ringSection;
     torMagic  = be32toh(torHeader->magic);
+    torVersion = torHeader->version;
     chipType  = torHeader->chipType;
 
     rc = ringid_get_noof_chiplets( chipType,
@@ -115,6 +117,16 @@ int get_ring_from_ring_section( void*           i_ringSection,     // Ring secti
             numRings = bInstCase ? cpltData->iv_num_instance_rings : cpltData->iv_num_common_rings;
             ringIdList = bInstCase ? ringIdListInstance : ringIdListCommon;
 
+            // Adjust number of variants according to TOR version of image
+            if (torVersion < 7)
+            {
+                // Nothing to do. Number of variants is the same for Common and Instance rings.
+            }
+            else
+            {
+                numVariants = bInstCase ? 1 : numVariants; // Only BASE variant for Instance rings
+            }
+
             if (ringIdList) // Only proceed if chiplet has [Common/Instance] rings.
             {
                 // Calc offset to chiplet's CMN or INST section, cpltOffset (steps 1-3)
@@ -142,8 +154,8 @@ int get_ring_from_ring_section( void*           i_ringSection,     // Ring secti
                             if ( strcmp( (ringIdList + iRing)->ringName,
                                          ringProps[i_ringId].iv_name ) == 0 &&
                                  ( i_ringVariant == ringVariantOrder->variant[iVariant] ||
-                                   numVariants == 1 ) &&  // If no variants, ignore Variant
-                                 ( !bInstCase || ( bInstCase && iInst == io_instanceId) ) )
+                                   numVariants == 1 ) &&  // If no variants, ignore i_ringVariant and assume "BASE" ring
+                                 ( !bInstCase || ( bInstCase && iInst == io_instanceId ) ) )
                             {
                                 strcpy(o_ringName, (ringIdList + iRing)->ringName);