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authorPrasad Bg Ranganath <prasadbgr@in.ibm.com>2017-08-23 03:51:44 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-09-05 23:37:11 -0400
commit9caf663dd9b91fbdc8cad8efa0a07c701c59a46b (patch)
tree415f4f5f2eeb796a250939e08ca0f5a8c1bbb409 /src/import/chips/p9
parent9b446b1bc74b5c3e74d43a8b42fb7e2f15ea5e96 (diff)
downloadtalos-hostboot-9caf663dd9b91fbdc8cad8efa0a07c701c59a46b.tar.gz
talos-hostboot-9caf663dd9b91fbdc8cad8efa0a07c701c59a46b.zip
Bug fix in PM firinit procedures(CME,OCC,PBA)
CQ:SW399439 Change-Id: Idf183e38f695fd32b6a4aeacf2303b7bf19879df Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45033 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45037 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C18
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H28
-rw-r--r--src/import/chips/p9/procedures/hwp/pm/p9_pm_firinit.C10
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml4
4 files changed, 18 insertions, 42 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C
index e5a69ec56..37240256d 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_corequad_init.C
@@ -282,7 +282,6 @@ fapi2::ReturnCode pm_corequad_reset(
uint8_t l_chpltNumber = 0;
uint64_t l_address = 0;
uint32_t l_errMask = 0;
- uint32_t l_firMask = 0;
uint32_t l_pollCount = 20;
bool l_l2_is_scanable = false;
bool l_l3_is_scanable = false;
@@ -374,23 +373,6 @@ fapi2::ReturnCode pm_corequad_reset(
l_ex_chplt);
FAPI_DBG("EX number = %d", l_chpltNumber);
- // Store CME FIR MASK in an attribute
- FAPI_INF("Store CME FIR MASK HWP attribute");
- l_address = EX_CME_SCOM_LFIRMASK;
- FAPI_TRY(fapi2::getScom(l_ex_chplt, l_address, l_data64),
- "ERROR: Failed to fetch the QUAD PPM Error Mask");
- l_data64.extractToRight<uint32_t>(l_firMask, 0, 32);
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_CME_LOCAL_FIRMASK, l_ex_chplt,
- l_firMask),
- "ERROR: Failed to set CME FIR Mask");
-
- // Write parameter provided value to CME FIR MASK
- FAPI_INF(" Write Local CME FIR MASK ");
- l_data64.flush<0>().insertFromRight<0, 32>(i_cmeFirMask);
- l_address = EX_CME_SCOM_LFIRMASK;
- FAPI_TRY(fapi2::putScom(l_ex_chplt, l_address, l_data64),
- "ERROR: Failed to clear the Local CME FIR Mask");
-
// Program XCR to HALT CME 0 & 1 and verify by polling the XSR
// Set the value of bits as follows:
// bits (1,2,3) = 001 : halt state
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H
index 76a6c4269..2cfd3dd17 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H
@@ -387,6 +387,7 @@ fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg)
if(i_reg == REG_FIRMASK || i_reg == REG_ALL)
{
FAPI_TRY(fapi2::getScom(iv_proc, iv_mask_address, iv_mask));
+ FAPI_INF("PROC Mask Address %08X, Mask value %16llx", iv_mask_address, iv_mask);
iv_and_mask = iv_mask;
iv_or_mask = iv_mask;
iv_mask_write = false;
@@ -418,6 +419,7 @@ fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg)
if(i_reg == REG_FIRMASK || i_reg == REG_ALL)
{
FAPI_TRY(fapi2::getScom(iv_ex, iv_mask_address, iv_mask));
+ FAPI_INF("EX Mask Address %08X, Mask value %16llx", iv_mask_address, iv_mask);
iv_and_mask = iv_mask;
iv_or_mask = iv_mask;
iv_mask_write = false;
@@ -431,6 +433,7 @@ fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg)
if (i_reg == REG_ERRMASK)
{
FAPI_TRY(fapi2::getScom(iv_eq, iv_mask_address, iv_mask));
+ FAPI_INF("EQ Mask Address %08X, Mask value %16llx", iv_mask_address, iv_mask);
iv_and_mask = iv_mask;
iv_or_mask = iv_mask;
iv_mask_write = false;
@@ -444,6 +447,7 @@ fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg)
if (i_reg == REG_ERRMASK)
{
FAPI_TRY(fapi2::getScom(iv_core, iv_mask_address, iv_mask));
+ FAPI_INF("CORE Mask Address %08X, Mask value %16llx", iv_mask_address, iv_mask);
iv_and_mask = iv_mask;
iv_or_mask = iv_mask;
iv_mask_write = false;
@@ -769,8 +773,8 @@ fapi2::ReturnCode PMFir<Ftype>::saveMask()
template <> inline
fapi2::ReturnCode PMFir<FIRTYPE_OCC_LFIR>::saveMask()
{
- uint32_t l_mask;
- iv_mask.extract<0, 32>(l_mask);
+ uint64_t l_mask;
+ iv_mask.extract<0, 64>(l_mask);
FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_OCC_LFIR, iv_proc, l_mask),
"ERROR: Failed to save OCC LFIR");
@@ -787,8 +791,8 @@ fapi_try_exit:
template <> inline
fapi2::ReturnCode PMFir<FIRTYPE_PBA_LFIR>::saveMask()
{
- uint32_t l_mask;
- iv_mask.extract<0, 32>(l_mask);
+ uint64_t l_mask;
+ iv_mask.extract<0, 64>(l_mask);
FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PBA_LFIR, iv_proc, l_mask),
"ERROR: Failed to save PBA LFIR");
fapi_try_exit:
@@ -860,14 +864,14 @@ fapi2::ReturnCode PMFir<Ftype>::restoreSavedMask()
template <> inline
fapi2::ReturnCode PMFir<FIRTYPE_OCC_LFIR>::restoreSavedMask()
{
- uint32_t l_mask;
- uint32_t l_tempMask;
+ uint64_t l_mask;
+ uint64_t l_tempMask;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OCC_LFIR, iv_proc, l_mask),
"ERROR: Failed to retrieve saved OCC LFIR");
- iv_mask.extract<0, 32>(l_tempMask);
+ iv_mask.extract<0, 64>(l_tempMask);
l_mask |= l_tempMask;
- iv_mask.insertFromRight<0, 32>(l_mask);
+ iv_mask.insertFromRight<0, 64>(l_mask);
iv_or_mask = iv_mask;
iv_and_mask = iv_mask;
iv_mask_write = true;
@@ -887,14 +891,14 @@ fapi_try_exit:
template <> inline
fapi2::ReturnCode PMFir<FIRTYPE_PBA_LFIR>::restoreSavedMask()
{
- uint32_t l_mask;
- uint32_t l_tempMask;
+ uint64_t l_mask;
+ uint64_t l_tempMask;
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PBA_LFIR, iv_proc, l_mask),
"ERROR: Failed to retrieve saved PBA LFIR");
- iv_mask.extract<0, 32>(l_tempMask);
+ iv_mask.extract<0, 64>(l_tempMask);
l_mask |= l_tempMask;
- iv_mask.insertFromRight<0, 32>(l_mask);
+ iv_mask.insertFromRight<0, 64>(l_mask);
iv_or_mask = iv_mask;
iv_and_mask = iv_mask;
iv_mask_write = true;
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_firinit.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_firinit.C
index 3d0baf552..4d086a9aa 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_firinit.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_firinit.C
@@ -113,16 +113,6 @@ fapi2::ReturnCode p9_pm_firinit(
"ERROR: Failed to set firinit call status after init");
}
}
- else if (i_mode == p9pm::PM_RESET)
- {
- if (l_pm_firinit_flag != 2)
- {
- l_pm_firinit_flag = 2;
- FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PM_FIRINIT_DONE_ONCE_FLAG,
- i_target, l_pm_firinit_flag),
- "ERROR: Failed to set firinit call status after reset");
- }
- }
fapi_try_exit:
FAPI_INF("p9_pm_firinit end");
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml
index 5d06c2637..aeb17b3f8 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml
@@ -88,7 +88,7 @@
<description>The attribute stores the Local FIR value of OCC taken
during the reset phase.
</description>
- <valueType>uint32</valueType>
+ <valueType>uint64</valueType>
<writeable/>
</attribute>
<!-- ********************************************************************* -->
@@ -98,7 +98,7 @@
<description>The attribute stores the Local FIR value of PBA taken
during the reset phase.
</description>
- <valueType>uint32</valueType>
+ <valueType>uint64</valueType>
<writeable/>
</attribute>
<!-- ********************************************************************* -->
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