GPTR/Overlays stage-2 support

-Updated ringClass to include Gptr for Nest/EQ/EX/EC to support
CME/SGPE.
- Bug fixes:
  - big endian to local host endian conversion
  - now also processing Gptr rings in RT_CME/SGPE sysPhases
  - improved error checking, error capturing and trace outs

Change-Id: Idfc19bdf1b7187d6f75c459f7ddbeda80ccfec28
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43080
Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43082
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

8 files changed, 392 insertions, 333 deletions

diff --git a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
index 058b83deb..8a73cddcd 100644
--- a/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
+++ b/src/import/chips/p9/procedures/hwp/customize/p9_xip_customize.C
@@ -216,13 +216,14 @@ fapi_try_exit:
 
 
 // Function: get_overlays_ring()
+// @brief: This function is used to get gptr ring from overlays section
 //
 // Parameter list:
 // const fapi2::Target &i_target:    Processor chip target.
 // void*     i_overlaysSection:  Pointer to extracted DD section in hw image
 // RingID    i_ringId:           GPTR ring id
-// void*     io_ringBuf2:        Ring work buffer
-// void*     io_ringBuf3:        Ring work buffer
+// void*     io_ringBuf2:        Work buffer which contains RS4 ring on return.
+// void*     io_ringBuf3:        Work buffer which contains data+care raw rings on return.
 // uint32_t* o_ovlyUncmpSize     Overlay/gptr uncompressed ring size
 #ifdef WIN32
 int get_overlays_ring(
@@ -239,14 +240,18 @@ fapi2::ReturnCode get_overlays_ring(
 {
     ReturnCode l_fapiRc = fapi2::FAPI2_RC_SUCCESS;
     fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
-    int l_rc = 0;
+    int l_rc = INFRASTRUCT_RC_SUCCESS;
     uint8_t* data = NULL;
     uint8_t* care = NULL;
-    uint16_t l_unusedParam1 = 0;    // For dd level
-    uint8_t  l_unusedParam2 = 0;    // For instance id
-    uint32_t l_unusedParam3;        // For ringBlockSize
     uint32_t l_ovlyUncmpSize = 0;
-    size_t byteCopy;
+    size_t byteCopy = 0;
+
+    // As we'll be using tor api tor_get_single_ring() with P9_XIP_MAGIC_SEEPROM
+    // to identify TOR layout for overlays/overrides sections we have to define
+    // following variables (though unused in this context) to support the i/f.
+    uint16_t l_ddLevel = 0;    // Unused param (dd level)
+    uint8_t  l_instanceId = 0; // Unused param (instance id)
+    uint32_t l_ringBlockSize = 0xFFFFFFFF;  // Unused param (ringBlockSize)
 
     FAPI_DBG("Entering get_overlays_ring");
 
@@ -254,73 +259,71 @@ fapi2::ReturnCode get_overlays_ring(
     l_rc = P9_TOR::tor_get_single_ring(
                i_overlaysSection,
                P9_XIP_MAGIC_SEEPROM,
-               l_unusedParam1,
+               l_ddLevel,
                i_ringId,
                P9_TOR::SBE,
                OVERLAY,
-               l_unusedParam2,
+               l_instanceId,
                io_ringBuf2,
-               l_unusedParam3);
+               l_ringBlockSize);
 
-    if (l_rc)
+    if (l_rc == INFRASTRUCT_RC_SUCCESS)
     {
-        if (l_rc == TOR_RING_NOT_FOUND)
-        {
-            *io_ringBuf2 = NULL;
-            *io_ringBuf3 = NULL;
-
-            FAPI_DBG("GPTR ring %d not found in overlays section", i_ringId);
-            fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
-            goto fapi_try_exit;
-        }
-        else
-        {
-            FAPI_ASSERT( false,
-                         fapi2::XIPC_GPTR_GET_SINGLE_RING_ERROR().
-                         set_CHIP_TARGET(i_procTarget).
-                         set_RING_ID(i_ringId).
-                         set_CHIPLET_ID(0xff).
-                         set_LOCAL_RC(l_rc).
-                         set_OCCURRENCE(2),
-                         "tor_get_single_ring() for gptr: Failed w/rc=%i for "
-                         "ringId=0x%02X, chipletId=0xff, occurrence=2 ",
-                         l_rc, i_ringId );
-        }
+        FAPI_DBG("Successfully found Gptr ringId=0x%x of iv_size=%d bytes", i_ringId,
+                 be16toh(((CompressedScanData*)(*io_ringBuf2))->iv_size));
+
+        //Decompress Gptr ring
+        l_rc = rs4_decompress(
+                   &data,
+                   &care,
+                   &l_ovlyUncmpSize,
+                   (CompressedScanData*)(*io_ringBuf2));
+
+        FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
+                     fapi2::XIPC_RS4_DECOMPRESS_ERROR().
+                     set_CHIP_TARGET(i_procTarget).
+                     set_RING_ID(i_ringId).
+                     set_CHIPLET_ID(0xff).
+                     set_LOCAL_RC(l_rc).
+                     set_OCCURRENCE(2),
+                     "rs4_decompress() failed w/rc=%i for "
+                     "ringId=0x%x, chipletId=0xff, occurrence=2 ",
+                     l_rc, i_ringId );
+
+        // Copy data and care bits into io_ringBuf3
+        byteCopy = (l_ovlyUncmpSize % 8 == 0 ? l_ovlyUncmpSize / 8 : (l_ovlyUncmpSize / 8) + 1);
+        memcpy(*io_ringBuf3, data, byteCopy);
+        memcpy(((uint8_t*)(*io_ringBuf3) + MAX_RING_BUF_SIZE / 2), care, byteCopy);
+
+        // For debug and testing
+        FAPI_DBG("Overlay raw data+care ring size=%d bits", l_ovlyUncmpSize);
+        print_raw_ring( data, l_ovlyUncmpSize);
+        print_raw_ring( care, l_ovlyUncmpSize);
+
+        // Copy the gptr uncompressed size
+        *o_ovlyUncmpSize = l_ovlyUncmpSize;
     }
+    else
+    {
+        FAPI_ASSERT( l_rc == TOR_RING_NOT_FOUND,
+                     fapi2::XIPC_GPTR_GET_SINGLE_RING_ERROR().
+                     set_CHIP_TARGET(i_procTarget).
+                     set_RING_ID(i_ringId).
+                     set_CHIPLET_ID(0xff).
+                     set_LOCAL_RC(l_rc).
+                     set_OCCURRENCE(2),
+                     "tor_get_single_ring() for gptr: Failed w/rc=%i for "
+                     "ringId=0x%x, chipletId=0xff, occurrence=2 ",
+                     l_rc, i_ringId );
 
-    FAPI_DBG("Successfully found Gptr ring:=0x%02X of size:=%d bytes", i_ringId,
-             be16toh(((CompressedScanData*)(*io_ringBuf2))->iv_size));
-
-    //Decompress Gptr ring
-    l_rc = rs4_decompress(
-               &data,
-               &care,
-               &l_ovlyUncmpSize,
-               (CompressedScanData*)(*io_ringBuf2));
-
-    FAPI_ASSERT( l_rc == 0,
-                 fapi2::XIPC_RS4_DECOMPRESS_ERROR().
-                 set_CHIP_TARGET(i_procTarget).
-                 set_RING_ID(i_ringId).
-                 set_CHIPLET_ID(0xff).
-                 set_LOCAL_RC(l_rc).
-                 set_OCCURRENCE(2),
-                 "rs4_decompress() for gptr: Failed w/rc=%i for "
-                 "ringId=0x%02X, chipletId=0xff, occurrence=2 ",
-                 l_rc, i_ringId );
-
-    // Copy data and care bits into io_ringBuf3
-    byteCopy = (l_ovlyUncmpSize % 8 == 0 ? l_ovlyUncmpSize / 8 : (l_ovlyUncmpSize / 8) + 1);
-    memcpy(*io_ringBuf3, data, byteCopy);
-    memcpy(((uint8_t*)(*io_ringBuf3) + MAX_RING_BUF_SIZE / 2), care, byteCopy);
-
-    // For debug and testing
-    FAPI_DBG("Overlay ring: data care (size:%d bits)", l_ovlyUncmpSize);
-    print_raw_ring( data, l_ovlyUncmpSize);
-    print_raw_ring( care, l_ovlyUncmpSize);
+        *io_ringBuf2 = NULL;
+        *io_ringBuf3 = NULL;
 
-    // Copy the gptr uncompressed size
-    *o_ovlyUncmpSize = l_ovlyUncmpSize;
+        // Return success here if gptr rings not found as its not an error.
+        // Not finding gptr rings is expected in most cases.
+        FAPI_DBG("GPTR ring %d not found in overlays section", i_ringId);
+        fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
+    }
 
 fapi_try_exit:
     FAPI_DBG("Exiting get_overlays_ring");
@@ -329,13 +332,14 @@ fapi_try_exit:
 
 
 // Function: apply_overlays_ring()
+// @brief: This function is used to apply the overlays logic to gptr rings
+// found in overlays section.
 //
 // Parameter list:
 // const fapi2::Target &i_target:    Processor chip target.
-// void*    io_vpdRing:     VPD ring buffer
-// void*    i_ringBuf2:     Ring work buffer
-// void*    i_ringBuf3:     Ring work buffer
-// uint32_t o_ovlyUncmpSize Overlay/gptr uncompressed ring size
+// void*    io_vpdRing:      Contains Mvpd RS4 ring on input and final Vpd RS4 ring on output.
+// void*    i_ovlyRawRing:   Raw data+care overlays ring
+// uint32_t i_ovlyUncmpSize: Overlay/gptr uncompressed ring size
 #ifdef WIN32
 int apply_overlays_ring(
     int i_procTarget,
@@ -343,13 +347,12 @@ int apply_overlays_ring(
 fapi2::ReturnCode apply_overlays_ring(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_procTarget,
 #endif
-    void* io_vpdRing,
-    void* i_ringBuf2,
-    void* i_ringBuf3,
+    void*    io_vpdRing,
+    void*    i_ovlyRawRing,
     uint32_t i_ovlyUncmpSize)
 {
     fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
-    int l_rc = 0;
+    int l_rc = INFRASTRUCT_RC_SUCCESS;
     uint8_t* dataVpd = NULL;
     uint8_t* careVpd = NULL;
     uint8_t* dataOvly = NULL;
@@ -360,8 +363,8 @@ fapi2::ReturnCode apply_overlays_ring(
     FAPI_DBG("Entering apply_overlays_ring");
 
     // Get the data & care for Gptr/overlays ring
-    dataOvly = (uint8_t*)i_ringBuf3;
-    careOvly = (uint8_t*)i_ringBuf3 + MAX_RING_BUF_SIZE / 2;
+    dataOvly = (uint8_t*)i_ovlyRawRing;
+    careOvly = (uint8_t*)i_ovlyRawRing + MAX_RING_BUF_SIZE / 2;
 
     FAPI_DBG("Decompress vpd ring");
     l_rc = rs4_decompress(
@@ -370,7 +373,7 @@ fapi2::ReturnCode apply_overlays_ring(
                &vpdUncmpSize,
                (CompressedScanData*)io_vpdRing);
 
-    FAPI_ASSERT( l_rc == 0,
+    FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
                  fapi2::XIPC_RS4_DECOMPRESS_ERROR().
                  set_CHIP_TARGET(i_procTarget).
                  set_RING_ID(0xff).
@@ -385,13 +388,13 @@ fapi2::ReturnCode apply_overlays_ring(
     print_raw_ring( dataVpd, vpdUncmpSize);
     print_raw_ring( careVpd, vpdUncmpSize);
 
-    // Compare uncompressed vpd and overlays ring sizes
+    // Compare uncompressed Mvpd and overlays ring sizes
     FAPI_ASSERT( i_ovlyUncmpSize == vpdUncmpSize,
-                 fapi2::XIPC_GPTR_RING_SIZES_MISMATCH_ERROR().
+                 fapi2::XIPC_MVPD_OVLY_RAW_RING_SIZE_MISMATCH_ERROR().
                  set_CHIP_TARGET(i_procTarget).
-                 set_VPD_SIZE(vpdUncmpSize).
+                 set_MVPD_SIZE(vpdUncmpSize).
                  set_OVLY_SIZE(i_ovlyUncmpSize),
-                 "VPD (size:%d) and overlay (size:%d) rings sizes don't match.",
+                 "MVPD raw size (=%d) and overlay raw size (=%d) don't match.",
                  vpdUncmpSize, i_ovlyUncmpSize);
 
     // Perform Overlay operation:
@@ -431,6 +434,8 @@ fapi2::ReturnCode apply_overlays_ring(
     // Processing remainder of data & care bits (mod 8)
     if (vpdUncmpSize % 8)
     {
+        i = (int)vpdUncmpSize / 8;
+
         careOvly[i] &= ~(0xFF << (8 - (vpdUncmpSize % 8)));
 
         if (careOvly[i] > 0)
@@ -466,8 +471,8 @@ fapi2::ReturnCode apply_overlays_ring(
                dataVpd,
                careVpd,
                vpdUncmpSize,
-               ((CompressedScanData*)io_vpdRing)->iv_scanAddr,
-               ((CompressedScanData*)io_vpdRing)->iv_ringId);
+               be32toh(((CompressedScanData*)io_vpdRing)->iv_scanAddr),
+               be16toh(((CompressedScanData*)io_vpdRing)->iv_ringId));
 
     FAPI_ASSERT( l_rc == 0,
                  fapi2::XIPC_RS4_COMPRESS_ERROR().
@@ -489,14 +494,14 @@ fapi_try_exit:
 
 
 // Function: process_gptr_rings()
+// @brief: This function is used to check and process gptr rings.
 //
 // Parameter list:
 // const fapi2::Target &i_target: Processor chip target.
-// RingIdList i_ring:             GPTR ring id
 // void*      i_overlaysSection:  Pointer to extracted DD section in hw image
-// void*      io_vpdRing:         VPD ring buffer
-// void*      io_ringBuf2:        Ring work buffer(overlays)
-// void*      io_ringBuf3:        Ring work buffer(mvpd)
+// void*      io_vpdRing:         Has Mvpd RS4 ring on input and final Vpd RS4 ring on output
+// void*      io_ringBuf2:        Ring work buffer(used for RS4 overlays ring)
+// void*      io_ringBuf3:        Ring work buffer(used for raw data+care overlays ring)
 #ifdef WIN32
 int process_gptr_rings(
     int i_procTarget,
@@ -504,7 +509,6 @@ int process_gptr_rings(
 fapi2::ReturnCode process_gptr_rings(
     const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_procTarget,
 #endif
-    const RingIdList i_ring,
     void* i_overlaysSection,
     void* io_vpdRing,
     void* io_ringBuf2,
@@ -512,63 +516,80 @@ fapi2::ReturnCode process_gptr_rings(
 {
     ReturnCode l_fapiRc = fapi2::FAPI2_RC_SUCCESS;
     fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
-    uint32_t ovlyUncmpSize = 0;
+    uint32_t l_ovlyUncmpSize = 0;
+    RingID   l_vpdRingId   = (RingID)be16toh(((CompressedScanData*)io_vpdRing)->iv_ringId);
+    uint32_t l_vpdScanAddr = be32toh(((CompressedScanData*)io_vpdRing)->iv_scanAddr);
 
     FAPI_DBG("Entering process_gptr_rings");
-    FAPI_DBG("Process GPTR ring %d ", i_ring.ringId);
-
-    // Get Gptr ring from overlay section
-    void* l_ringBuf2 = io_ringBuf2;
-    void* l_ringBuf3 = io_ringBuf3;
-
-    l_fapiRc = get_overlays_ring(
-                   i_procTarget,
-                   i_overlaysSection,
-                   i_ring.ringId,
-                   &l_ringBuf2,
-                   &l_ringBuf3,
-                   &ovlyUncmpSize);
-
-    if (l_fapiRc != fapi2::FAPI2_RC_SUCCESS)
-    {
-        FAPI_DBG("get_overlays_ring() failed w/rc=0x%08x", (uint64_t)l_fapiRc);
-        fapi2::current_err = l_fapiRc;
-        goto fapi_try_exit;
-    }
+    FAPI_DBG("Processing GPTR ringId=0x%x", l_vpdRingId);
+
+    // Used for getting Gptr ring from overlays section
+    void* l_ovlyRs4Ring = io_ringBuf2;
+    void* l_ovlyRawRing = io_ringBuf3;
+
+    FAPI_TRY( get_overlays_ring(
+                  i_procTarget,
+                  i_overlaysSection,
+                  l_vpdRingId,
+                  &l_ovlyRs4Ring, // Has RS4 ring on return
+                  &l_ovlyRawRing, // Has raw data+care ring on return
+                  &l_ovlyUncmpSize),
+              "get_overlays_ring() failed w/rc=0x%08x",
+              (uint32_t)current_err );
 
-    // Check whether overlays/gptr ring was found or not (=NULL)
-    if (l_ringBuf2 == NULL && l_ringBuf3 == NULL)
+    // Check whether both ovlyRs4/RawRing ring pointers match the original input buffer
+    // pointers which would verify that an gptr overlays ring was found
+    if (l_ovlyRs4Ring == io_ringBuf2 && l_ovlyRawRing == io_ringBuf3)
     {
-        fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
-        goto fapi_try_exit;
+        // Check that RS4 headers of the Mvpd and overlays rings match
+        FAPI_ASSERT( ( ((CompressedScanData*)io_vpdRing)->iv_ringId ==
+                       ((CompressedScanData*)l_ovlyRs4Ring)->iv_ringId &&
+                       ((CompressedScanData*)io_vpdRing)->iv_scanAddr ==
+                       ((CompressedScanData*)l_ovlyRs4Ring)->iv_scanAddr ),
+                     fapi2::XIPC_MVPD_OVLY_RING_HEADER_MISMATCH_ERROR().
+                     set_CHIP_TARGET(i_procTarget).
+                     set_MVPD_RING_ID(l_vpdRingId).
+                     set_OVLY_RING_ID(be16toh(((CompressedScanData*)l_ovlyRs4Ring)->iv_ringId)).
+                     set_MVPD_SCAN_ADDR(l_vpdScanAddr).
+                     set_OVLY_SCAN_ADDR(be32toh(((CompressedScanData*)l_ovlyRs4Ring)->iv_scanAddr)),
+                     "MVPD and Ovly RS4 headers don't match:\n"
+                     " Mvpd ringId: 0x%x\n"
+                     " Ovly ringId: 0x%x\n"
+                     " Mvpd scanAddr: 0x%08x\n"
+                     " Ovly scanAddr: 0x%08x",
+                     l_vpdRingId,
+                     be16toh(((CompressedScanData*)l_ovlyRs4Ring)->iv_ringId),
+                     l_vpdScanAddr,
+                     be32toh(((CompressedScanData*)l_ovlyRs4Ring)->iv_scanAddr) );
+
+        // Apply overlays operations
+        FAPI_TRY( apply_overlays_ring(
+                      i_procTarget,
+                      io_vpdRing,
+                      l_ovlyRawRing,
+                      l_ovlyUncmpSize),
+                  "apply_overlays_ring() failed w/rc=0x%08x for ringId=0x%x",
+                  (uint32_t)current_err, l_vpdRingId);
     }
-    else if (l_ringBuf2 != io_ringBuf2 || l_ringBuf3 != io_ringBuf3)
+    else
     {
-        FAPI_ASSERT( false,
-                     fapi2::XIPC_RING_BUFFER_MISMATCH_ERROR().
+        // Next, we check that the overlay buffer pointers are NULL which verifies that
+        // no overlays ring was found. This is normal and is NOT an error.  However, if
+        // the overlay buffer pointers neither match the original input work buffers
+        // (which they don't if we here in this spot)  AND if they are not NULL either,
+        // then that is a code bug error case.
+        FAPI_ASSERT( (l_ovlyRs4Ring == NULL && l_ovlyRawRing == NULL),
+                     fapi2::XIPC_OVLY_RING_BUFFER_MISMATCH_ERROR().
                      set_CHIP_TARGET(i_procTarget).
-                     set_RING_ID(i_ring.ringId).
+                     set_RING_ID(l_vpdRingId).
                      set_RING_BUF2(io_ringBuf2).
-                     set_RING_BUF2_LOCAL(l_ringBuf2).
+                     set_RING_BUF2_LOCAL(l_ovlyRs4Ring).
                      set_RING_BUF3(io_ringBuf3).
-                     set_RING_BUF3_LOCAL(l_ringBuf3).
-                     set_OCCURRENCE(1),
-                     "process_gptr_rings(): Failed with ring buffers mismatch");
-    }
-
-    // Apply overlays operations
-    l_fapiRc = apply_overlays_ring(
-                   i_procTarget,
-                   io_vpdRing,
-                   io_ringBuf2,
-                   io_ringBuf3,
-                   ovlyUncmpSize);
+                     set_RING_BUF3_LOCAL(l_ovlyRawRing),
+                     "process_gptr_rings(): Code bug: Failed with ring buffer pointer mismatch");
 
-    if (l_fapiRc != fapi2::FAPI2_RC_SUCCESS)
-    {
-        FAPI_DBG("apply_overlays_ring() failed w/rc=0x%08x", (uint64_t)l_fapiRc);
-        fapi2::current_err = l_fapiRc;
-        goto fapi_try_exit;
+        // Return success
+        fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
     }
 
 fapi_try_exit:
@@ -713,22 +734,19 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
 
         // Check for Gptr rings (ovly-gptr) in overlays section and if found
         // process it over mvpd-gptr ring.
-        if (i_ring.vpdRingClass == VPD_RING_CLASS_GPTR)
+        if (i_ring.vpdRingClass == VPD_RING_CLASS_GPTR_NEST ||
+            i_ring.vpdRingClass == VPD_RING_CLASS_GPTR_EQ ||
+            i_ring.vpdRingClass == VPD_RING_CLASS_GPTR_EX ||
+            i_ring.vpdRingClass == VPD_RING_CLASS_GPTR_EC)
         {
-            l_fapiRc = process_gptr_rings(
-                           i_procTarget,
-                           i_ring,
-                           i_overlaysSection,
-                           i_vpdRing,
-                           i_ringBuf2,
-                           i_ringBuf3);
-
-            if (l_fapiRc != fapi2::FAPI2_RC_SUCCESS)
-            {
-                FAPI_DBG("process_gptr_rings() failed w/rc=0x%08x", (uint64_t)l_fapiRc);
-                fapi2::current_err = l_fapiRc;
-                goto fapi_try_exit;
-            }
+            FAPI_TRY( process_gptr_rings(
+                          i_procTarget,
+                          i_overlaysSection,
+                          i_vpdRing,
+                          i_ringBuf2,
+                          i_ringBuf3),
+                      "process_gptr_rings() failed w/rc=0x%08x",
+                      (uint32_t)current_err );
 
             // Update vpdRingSize to new value if any
             l_vpdRingSize = be16toh(((CompressedScanData*)i_vpdRing)->iv_size);
@@ -739,6 +757,7 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
         //       Also fix p9_mvpd_ring_funcs.C to look for entire RS4_MAGIC string.
         //       Actually, do all the above in connection with RS4 header
         //       shrinkage (RTC158101 and RTC159801).
+        // This TODO item now captured in RTC177327.
         ((CompressedScanData*)i_vpdRing)->iv_magic = htobe16(RS4_MAGIC);
 
         // Initialize variable to check for redundant ring.
@@ -755,7 +774,7 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
                      set_LOCAL_RC(l_rc).
                      set_OCCURRENCE(1),
                      "rs4_redundant: Failed w/rc=%i for "
-                     "ringId=0x%02X, chipletId=0x%02X, occurrence=1 ",
+                     "ringId=0x%x, chipletId=0x%02X, occurrence=1 ",
                      l_rc, i_ring.ringId, i_chipletId );
 
         // Regarding Gptr rings processing:
@@ -767,7 +786,7 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
             // Update for ring found in mvpd contains redundant data
             io_ringStatusInMvpd = RING_REDUNDANT;
 
-            FAPI_DBG("Skipping redundant VPD ring: ringId=0x%02X, chipletId=0x%02X ", i_ring.ringId, i_chipletId);
+            FAPI_DBG("Skipping redundant VPD ring: ringId=0x%x, chipletId=0x%02X ", i_ring.ringId, i_chipletId);
             fapi2::current_err = RC_MVPD_RING_REDUNDANT_DATA;
             goto fapi_try_exit;
         }
@@ -838,9 +857,11 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
                     FAPI_ASSERT( false,
                                  fapi2::XIPC_TOR_APPEND_RING_FAILED().
                                  set_CHIP_TARGET(i_procTarget).
-                                 set_TOR_RC(l_rc),
-                                 "tor_append_ring() failed w/l_rc=%d",
-                                 l_rc );
+                                 set_TOR_RC(l_rc).
+                                 set_RING_ID(i_ring.ringId).
+                                 set_OCCURRENCE(1),
+                                 "tor_append_ring() failed in HB_SBE phase w/l_rc=%d for ringId=0x%x",
+                                 l_rc, i_ring.ringId );
                 }
 
                 break;
@@ -868,9 +889,11 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
                     FAPI_ASSERT( false,
                                  fapi2::XIPC_TOR_APPEND_RING_FAILED().
                                  set_CHIP_TARGET(i_procTarget).
-                                 set_TOR_RC(l_rc),
-                                 "tor_append_ring() failed w/l_rc=%d",
-                                 l_rc );
+                                 set_TOR_RC(l_rc).
+                                 set_RING_ID(i_ring.ringId).
+                                 set_OCCURRENCE(2),
+                                 "tor_append_ring() failed in RT_CME phase w/l_rc=%d for ringId=0x%x",
+                                 l_rc, i_ring.ringId );
                 }
 
                 FAPI_DBG("(After tor_append) io_ringSectionSize = %d", io_ringSectionSize);
@@ -900,9 +923,11 @@ fapi2::ReturnCode _fetch_and_insert_vpd_rings(
                     FAPI_ASSERT( false,
                                  fapi2::XIPC_TOR_APPEND_RING_FAILED().
                                  set_CHIP_TARGET(i_procTarget).
-                                 set_TOR_RC(l_rc),
-                                 "tor_append_ring() failed w/l_rc=%d",
-                                 l_rc );
+                                 set_TOR_RC(l_rc).
+                                 set_RING_ID(i_ring.ringId).
+                                 set_OCCURRENCE(3),
+                                 "tor_append_ring() failed in RT_SGPE phase w/l_rc=%d for ringId=0x%x",
+                                 l_rc, i_ring.ringId );
                 }
 
                 FAPI_DBG("(After tor_append) io_ringSectionSize = %d", io_ringSectionSize);
@@ -1001,7 +1026,7 @@ fapi2::ReturnCode resolve_gptr_overlays(
 
     fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
     P9XipSection l_xipSection;
-    int      l_rc = 0;
+    int      l_rc = INFRASTRUCT_RC_SUCCESS;
     uint8_t  l_nimbusDd1 = 1;
     bool     l_bDdSupport = false;
 
@@ -1024,7 +1049,7 @@ fapi2::ReturnCode resolve_gptr_overlays(
     // Second determine if there's no overlays support. If no, continue, else err out.
     l_rc = p9_xip_dd_section_support(i_hwImage, P9_XIP_SECTION_HW_OVERLAYS, l_bDdSupport);
 
-    FAPI_ASSERT( l_rc == 0,
+    FAPI_ASSERT( l_rc == INFRASTRUCT_RC_SUCCESS,
                  fapi2::XIPC_XIP_API_MISC_ERROR().
                  set_CHIP_TARGET(i_procTarget).
                  set_XIP_RC(l_rc).
@@ -1166,8 +1191,14 @@ fapi2::ReturnCode fetch_and_insert_vpd_rings(
             if ( l_ringIdList[iRing].vpdRingClass != VPD_RING_CLASS_EQ_INS &&
                  l_ringIdList[iRing].vpdRingClass != VPD_RING_CLASS_EX_INS &&
                  l_ringIdList[iRing].vpdRingClass != VPD_RING_CLASS_EC_INS &&
-                 ( l_ringIdList[iRing].vpdRingClass != VPD_RING_CLASS_GPTR ||
-                   ( l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_GPTR &&
+                 ( (l_ringIdList[iRing].vpdRingClass != VPD_RING_CLASS_GPTR_NEST &&
+                    l_ringIdList[iRing].vpdRingClass != VPD_RING_CLASS_GPTR_EQ &&
+                    l_ringIdList[iRing].vpdRingClass != VPD_RING_CLASS_GPTR_EX &&
+                    l_ringIdList[iRing].vpdRingClass != VPD_RING_CLASS_GPTR_EC) ||
+                   ( (l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_GPTR_NEST ||
+                      l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_GPTR_EQ ||
+                      l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_GPTR_EX ||
+                      l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_GPTR_EC ) &&
                      bGptrMvpdSupport ) ) )
             {
                 // We use ring.instanceIdMax column to govern max value of instanceIdMax (i.e., the
@@ -1191,12 +1222,17 @@ fapi2::ReturnCode fetch_and_insert_vpd_rings(
                     // - Fetch only EC VPD rings for CME.
                     // - Fetch only EX+EQ VPD rings for SGPE.
 
-                    if ( i_sysPhase == SYSPHASE_HB_SBE ||
-                         (i_sysPhase == SYSPHASE_RT_CME  &&
-                          l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_EC) ||
-                         (i_sysPhase == SYSPHASE_RT_SGPE &&
-                          (l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_EX ||
-                           l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_EQ)) )
+                    if ( i_sysPhase == SYSPHASE_HB_SBE   ||
+                         ( i_sysPhase == SYSPHASE_RT_CME &&
+                           ( l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_EC ||
+                             ( l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_GPTR_EC &&
+                               bGptrMvpdSupport ) ) )   ||
+                         ( i_sysPhase == SYSPHASE_RT_SGPE &&
+                           ( l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_EX ||
+                             l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_EQ ||
+                             ( (l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_GPTR_EQ ||
+                                l_ringIdList[iRing].vpdRingClass == VPD_RING_CLASS_GPTR_EX) &&
+                               bGptrMvpdSupport ) ) ) )
                     {
                         l_fapiRc = _fetch_and_insert_vpd_rings (
                                        i_procTarget,
@@ -2479,8 +2515,8 @@ ReturnCode p9_xip_customize (
                          set_CHIP_TARGET(i_procTarget).
                          set_TOR_RC(l_rc).
                          set_SYSPHASE(i_sysPhase),
-                         "tor_get_block_of_rings() failed w/rc=0x%08X",
-                         (uint32_t)l_rc );
+                         "tor_get_block_of_rings() failed w/rc=0x%08X in sysPhase=%d",
+                         (uint32_t)l_rc, i_sysPhase );
 
             FAPI_DBG("Size of .rings section before VPD update: %d", io_ringSectionBufSize);
 
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
index 05140e05c..172846033 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml
@@ -4270,8 +4270,8 @@
     <id>ATTR_CHIP_EC_FEATURE_NO_GPTR_SUPPORT_VIA_MVPD</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
-        indicaes if there is  GPTR support through MVPD which there will NOT be if
-        Nimbus DD1
+        GPTR support through MVPD is available in Nimbus DD2 and Cumulus and
+        will NOT be if Nimbus DD1.
     </description>
     <chipEcFeature>
       <chip>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml
index 810092910..6ed8f88b6 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_xip_customize_errors.xml
@@ -27,22 +27,18 @@
   <hwpError>
     <rc>RC_XIPC_BAD_PG_XLATE</rc>
     <description>Code bug: Invalid translation from PERV target chip unit position to image PG index</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>CHIP_UNIT_POS</ffdc>
+    <ffdc>PG_INDEX</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>CHIP_UNIT_POS</ffdc>
-    <ffdc>PG_INDEX</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_INVALID_INPUT_BUFFER_PARM</rc>
     <description>Caller bug: Caller supplied one or more invalid input buffer pointers</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>HW_IMAGE</ffdc>
     <ffdc>IMAGE_BUF</ffdc>
@@ -50,15 +46,15 @@
     <ffdc>RING_BUF1</ffdc>
     <ffdc>RING_BUF2</ffdc>
     <ffdc>RING_BUF3</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_INVALID_INPUT_BUFFER_SIZE_PARM</rc>
     <description>Caller bug: Caller supplied one or more invalid input buffer sizes</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>INPUT_IMAGE_SIZE</ffdc>
     <ffdc>IMAGE_BUF_SIZE</ffdc>
@@ -67,164 +63,170 @@
     <ffdc>RING_BUF_SIZE2</ffdc>
     <ffdc>RING_BUF_SIZE3</ffdc>
     <ffdc>OCCURRENCE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_INVALID_SYSPHASE_PARM</rc>
     <description>Caller bug: Caller supplied unsupported sysPhase</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>SYSPHASE</ffdc>
+    <ffdc>OCCURRENCE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>SYSPHASE</ffdc>
-    <ffdc>OCCURRENCE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_ATTR_MAX_SBE_SEEPROM_SIZE_TOO_SMALL</rc>
     <description>SBE Seeprom size reported in attribute is smaller than MAX_SBE_SEEPROM_SIZE</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>ATTR_MAX_SBE_SEEPROM_SIZE</ffdc>
+    <ffdc>MAX_SBE_SEEPROM_SIZE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>ATTR_MAX_SBE_SEEPROM_SIZE</ffdc>
-    <ffdc>MAX_SBE_SEEPROM_SIZE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_INVALID_VPD_KEYWORD</rc>
     <description>Code bug: Unsupported value of vpdKeyword</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>VPD_KEYWORD</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>VPD_KEYWORD</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_MVPD_CHIPLET_ID_MESS</rc>
     <description>VPD ring's chipletId doesn't match requested chipletId</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>RING_ID</ffdc>
     <ffdc>CHIPLET_ID</ffdc>
     <ffdc>MVPD_CHIPLET_ID</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_MVPD_RING_SIZE_MESS</rc>
     <description>VPD ring's size exceeds max ring buffer size</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>RING_ID</ffdc>
     <ffdc>CHIPLET_ID</ffdc>
     <ffdc>RING_BUFFER_SIZE</ffdc>
     <ffdc>MVPD_RING_SIZE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_MVPD_RING_SIZE_TOO_BIG</rc>
     <description>VPD ring's size exceed allowed ring buffer space</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>RING_ID</ffdc>
     <ffdc>CHIPLET_ID</ffdc>
     <ffdc>RING_BUFFER_SIZE</ffdc>
     <ffdc>MVPD_RING_SIZE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_MVPD_INVALID_RECORD_DATA</rc>
     <description>VPD ring's record data is invalid</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>RING_ID</ffdc>
+    <ffdc>CHIPLET_ID</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>RING_ID</ffdc>
-    <ffdc>CHIPLET_ID</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_MVPD_FIELD_SIZE_MESS</rc>
     <description>MVPD field size mess</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>MVPD_FIELD_SIZE</ffdc>
+    <ffdc>EXPECTED_SIZE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>MVPD_FIELD_SIZE</ffdc>
-    <ffdc>EXPECTED_SIZE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_RS4_REDUNDANT_ERROR</rc>
     <description>rs4_redundant() failed</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>RING_ID</ffdc>
     <ffdc>CHIPLET_ID</ffdc>
     <ffdc>LOCAL_RC</ffdc>
     <ffdc>OCCURRENCE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_TOR_APPEND_RING_FAILED</rc>
     <description>tor_append_ring() failed</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>TOR_RC</ffdc>
+    <ffdc>RING_ID</ffdc>
+    <ffdc>OCCURRENCE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>TOR_RC</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_SECTION_REMOVAL_ERROR</rc>
     <description>p9_xip_delete_section() failed to remove an XIP section</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>XIP_SECTION</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>XIP_SECTION</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_XIP_API_MISC_ERROR</rc>
     <description>An XIP API call failed with a non-categorized error</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>XIP_RC</ffdc>
+    <ffdc>OCCURRENCE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>XIP_RC</ffdc>
-    <ffdc>OCCURRENCE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_EMPTY_RING_SECTION</rc>
     <description>The ring section size is zero. No TOR. Can't append rings</description>
+    <ffdc>CHIP_TARGET</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
@@ -232,10 +234,6 @@
     <description>
       Ran out of image buffer space trying to append a ring to the .rings section
     </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>CURRENT_RING_SECTION_SIZE</ffdc>
     <ffdc>SIZE_OF_THIS_RING</ffdc>
@@ -243,6 +241,10 @@
     <ffdc>RING_ID</ffdc>
     <ffdc>CHIPLET_ID</ffdc>
     <ffdc>CURRENT_BOOT_CORE_MASK</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
@@ -250,13 +252,13 @@
     <description>
       Additional FFDC info for RC_XIPC_IMAGE_WOULD_OVERFLOW error
     </description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>REQUESTED_BOOT_CORE_MASK</ffdc>
+    <ffdc>CURRENT_BOOT_CORE_MASK</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>REQUESTED_BOOT_CORE_MASK</ffdc>
-    <ffdc>CURRENT_BOOT_CORE_MASK</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
@@ -264,146 +266,159 @@
     <description>
       Image buffer would overflow before reaching minimum number of boot cores
     </description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>REQUESTED_BOOT_CORE_MASK</ffdc>
     <ffdc>CURRENT_BOOT_CORE_MASK</ffdc>
     <ffdc>MIN_REQD_ECS</ffdc>
     <ffdc>ACTUAL_EC_COUNT</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_SECTION_SIZING</rc>
     <description>Code bug: Ring section size would exceed max ring section size</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>RING_SECTION_SIZE</ffdc>
+    <ffdc>MAX_RING_SECTION_SIZE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>RING_SECTION_SIZE</ffdc>
-    <ffdc>MAX_RING_SECTION_SIZE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_IMAGE_SIZING</rc>
     <description>Code bug: Image size would exceed max image size</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>IMAGE_SIZE_WITHOUT_RINGS</ffdc>
     <ffdc>RING_SECTION_SIZE</ffdc>
     <ffdc>MAX_IMAGE_SIZE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_IMAGE_TOO_LARGE</rc>
     <description>Image size exceeds max allowed image size</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>IMAGE_SIZE</ffdc>
     <ffdc>MAX_IMAGE_SIZE</ffdc>
     <ffdc>OCCURRENCE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_TOR_GET_BLOCK_OF_RINGS_FAILED</rc>
     <description>tor_get_block_of_rings() failed</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>TOR_RC</ffdc>
+    <ffdc>SYSPHASE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>TOR_RC</ffdc>
-    <ffdc>SYSPHASE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_FAPI_ATTR_SVC_FAIL</rc>
     <description>FAPI attribute service failed</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>OCCURRENCE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>OCCURRENCE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_GPTR_GET_SINGLE_RING_ERROR</rc>
     <description>tor_get_single_ring() for gptr failed</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>RING_ID</ffdc>
     <ffdc>CHIPLET_ID</ffdc>
     <ffdc>LOCAL_RC</ffdc>
     <ffdc>OCCURRENCE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
     <rc>RC_XIPC_RS4_DECOMPRESS_ERROR</rc>
     <description>rs4_decompress() for gptr failed</description>
-    <callout>
-      <procedure>CODE</procedure>
-      <priority>HIGH</priority>
-    </callout>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>RING_ID</ffdc>
     <ffdc>CHIPLET_ID</ffdc>
     <ffdc>LOCAL_RC</ffdc>
     <ffdc>OCCURRENCE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
-    <rc>RC_XIPC_GPTR_RING_SIZES_MISMATCH_ERROR</rc>
-    <description>Vpd and Ovly ring sizes mismatch</description>
+    <rc>RC_XIPC_MVPD_OVLY_RAW_RING_SIZE_MISMATCH_ERROR</rc>
+    <description>Mvpd and Ovly raw ring size mismatch</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>MVPD_SIZE</ffdc>
+    <ffdc>OVLY_SIZE</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
-    <ffdc>CHIP_TARGET</ffdc>
-    <ffdc>VPD_SIZE</ffdc>
-    <ffdc>OVLY_SIZE</ffdc>
   </hwpError>
   <!-- ********************************************************************* -->
   <hwpError>
-    <rc>RC_XIPC_RS4_COMPRESS_ERROR</rc>
-    <description>rs4_compress() for gptr failed</description>
+    <rc>RC_XIPC_MVPD_OVLY_RING_HEADER_MISMATCH_ERROR</rc>
+    <description>Mvpd and Ovly ring header mismatch</description>
+    <ffdc>CHIP_TARGET</ffdc>
+    <ffdc>MVPD_RING_ID</ffdc>
+    <ffdc>OVLY_RING_ID</ffdc>
+    <ffdc>MVPD_SCAN_ADDR</ffdc>
+    <ffdc>OVLY_SCAN_ADDR</ffdc>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
+  </hwpError>
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_XIPC_RS4_COMPRESS_ERROR</rc>
+    <description>rs4_compress() for gptr failed</description>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>RING_ID</ffdc>
     <ffdc>CHIPLET_ID</ffdc>
     <ffdc>LOCAL_RC</ffdc>
     <ffdc>OCCURRENCE</ffdc>
-  </hwpError>
-  <!-- ********************************************************************* -->
-  <hwpError>
-    <rc>RC_XIPC_RING_BUFFER_MISMATCH_ERROR</rc>
-    <description>process_gptr_rings(): Failed with ring buffers mismatch</description>
     <callout>
       <procedure>CODE</procedure>
       <priority>HIGH</priority>
     </callout>
+  </hwpError>
+  <!-- ********************************************************************* -->
+  <hwpError>
+    <rc>RC_XIPC_OVLY_RING_BUFFER_MISMATCH_ERROR</rc>
+    <description>Code bug: process_gptr_rings() failed with ring buffer pointer mismatch</description>
     <ffdc>CHIP_TARGET</ffdc>
     <ffdc>RING_ID</ffdc>
     <ffdc>RING_BUF2</ffdc>
     <ffdc>RING_BUF2_LOCAL</ffdc>
     <ffdc>RING_BUF3</ffdc>
     <ffdc>RING_BUF3_LOCAL</ffdc>
-    <ffdc>OCCURRENCE</ffdc>
+    <callout>
+      <procedure>CODE</procedure>
+      <priority>HIGH</priority>
+    </callout>
   </hwpError>
   <!-- ********************************************************************* -->
 </hwpErrors>
diff --git a/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H b/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
index 181aaba3f..048fd36e7 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
@@ -54,6 +54,8 @@ const uint32_t  MAX_NOOF_DD_LEVELS_IN_IMAGE = 20;
 #define NUM_OF_QUADS     6
 #define CORES_PER_QUAD  (NUM_OF_CORES/NUM_OF_QUADS)
 
+#define INFRASTRUCT_RC_SUCCESS 0
+
 enum SYSPHASE
 {
     SYSPHASE_HB_SBE = 0,
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
index c14f84b05..3e9a12c3e 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
@@ -38,82 +38,82 @@ const RingIdList RING_ID_LIST_PDG[] =
 {
     /* ringName           ringId  chipletId  vpdKeyword    */
     /*                            min   max                 */
-    {"perv_gptr",            perv_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"perv_gptr",            perv_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"perv_time",            perv_time, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"occ_gptr",              occ_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"occ_gptr",              occ_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"occ_time",              occ_time, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"perv_ana_gptr",    perv_ana_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"perv_pll_gptr",    perv_pll_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"n0_gptr",                n0_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"perv_ana_gptr",    perv_ana_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"perv_pll_gptr",    perv_pll_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"n0_gptr",                n0_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n0_time",                n0_time, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n0_nx_gptr",          n0_nx_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n0_nx_gptr",          n0_nx_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n0_nx_time",          n0_nx_time, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n0_cxa0_gptr",      n0_cxa0_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n0_cxa0_gptr",      n0_cxa0_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n0_cxa0_time",      n0_cxa0_time, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n1_gptr",                n1_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n1_gptr",                n1_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n1_time",                n1_time, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n1_ioo0_gptr",      n1_ioo0_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n1_ioo0_gptr",      n1_ioo0_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n1_ioo0_time",      n1_ioo0_time, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n1_ioo1_gptr",      n1_ioo1_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n1_ioo1_gptr",      n1_ioo1_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n1_ioo1_time",      n1_ioo1_time, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n1_mcs23_gptr",    n1_mcs23_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n1_mcs23_gptr",    n1_mcs23_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n1_mcs23_time",    n1_mcs23_time, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n2_gptr",                n2_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n2_gptr",                n2_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n2_time",                n2_time, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n2_cxa1_gptr",      n2_cxa1_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n2_cxa1_gptr",      n2_cxa1_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n2_cxa1_time",      n2_cxa1_time, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n2_psi_gptr",        n2_psi_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"n3_gptr",                n3_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n2_psi_gptr",        n2_psi_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"n3_gptr",                n3_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n3_time",                n3_time, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n3_mcs01_gptr",    n3_mcs01_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n3_mcs01_gptr",    n3_mcs01_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n3_mcs01_time",    n3_mcs01_time, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n3_np_gptr",          n3_np_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n3_np_gptr",          n3_np_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n3_np_time",          n3_np_time, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_gptr",                xb_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_gptr",                xb_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"xb_time",                xb_time, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_io0_gptr",        xb_io0_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_io0_gptr",        xb_io0_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"xb_io0_time",        xb_io0_time, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_io1_gptr",        xb_io1_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_io1_gptr",        xb_io1_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"xb_io1_time",        xb_io1_time, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_io2_gptr",        xb_io2_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_io2_gptr",        xb_io2_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"xb_io2_time",        xb_io2_time, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_pll_gptr",        xb_pll_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"mc_gptr",                mc_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_pll_gptr",        xb_pll_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"mc_gptr",                mc_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"mc_time",                mc_time, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"mc_iom01_gptr",    mc_iom01_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"mc_iom23_gptr",    mc_iom23_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"mc_pll_gptr",        mc_pll_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ob0_gptr",              ob0_gptr, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"mc_iom01_gptr",    mc_iom01_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"mc_iom23_gptr",    mc_iom23_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"mc_pll_gptr",        mc_pll_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"ob0_gptr",              ob0_gptr, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"ob0_time",              ob0_time, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"ob0_pll_gptr",      ob0_pll_gptr, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ob1_gptr",              ob1_gptr, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ob0_pll_gptr",      ob0_pll_gptr, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"ob1_gptr",              ob1_gptr, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"ob1_time",              ob1_time, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"ob1_pll_gptr",      ob1_pll_gptr, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ob2_gptr",              ob2_gptr, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ob1_pll_gptr",      ob1_pll_gptr, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"ob2_gptr",              ob2_gptr, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"ob2_time",              ob2_time, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"ob2_pll_gptr",      ob2_pll_gptr, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ob3_gptr",              ob3_gptr, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ob2_pll_gptr",      ob2_pll_gptr, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"ob3_gptr",              ob3_gptr, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"ob3_time",              ob3_time, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"ob3_pll_gptr",      ob3_pll_gptr, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"pci0_gptr",            pci0_gptr, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ob3_pll_gptr",      ob3_pll_gptr, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"pci0_gptr",            pci0_gptr, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"pci0_time",            pci0_time, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"pci0_pll_gptr",    pci0_pll_gptr, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"pci1_gptr",            pci1_gptr, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"pci0_pll_gptr",    pci0_pll_gptr, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"pci1_gptr",            pci1_gptr, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"pci1_time",            pci1_time, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"pci1_pll_gptr",    pci1_pll_gptr, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"pci2_gptr",            pci2_gptr, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"pci1_pll_gptr",    pci1_pll_gptr, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"pci2_gptr",            pci2_gptr, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"pci2_time",            pci2_time, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"pci2_pll_gptr",    pci2_pll_gptr, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"eq_gptr",                eq_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"pci2_pll_gptr",    pci2_pll_gptr, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"eq_gptr",                eq_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EQ},
     {"eq_time",                eq_time, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EQ},
-    {"ex_l3_gptr",          ex_l3_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ex_l3_gptr",          ex_l3_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EX},
     {"ex_l3_time",          ex_l3_time, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EX},
-    {"ex_l2_gptr",          ex_l2_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ex_l2_gptr",          ex_l2_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EX},
     {"ex_l2_time",          ex_l2_time, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EX},
-    {"ex_l3_refr_gptr", ex_l3_refr_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"eq_ana_gptr",        eq_ana_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"eq_dpll_gptr",      eq_dpll_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ec_gptr",                ec_gptr, 0x20, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ex_l3_refr_gptr", ex_l3_refr_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EX},
+    {"eq_ana_gptr",        eq_ana_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EQ},
+    {"eq_dpll_gptr",      eq_dpll_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EQ},
+    {"ec_gptr",                ec_gptr, 0x20, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EC},
     {"ec_time",                ec_time, 0x20, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EC},
 };
 
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
index 17e430761..6117a7bf9 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
@@ -83,14 +83,17 @@ enum VpdKeyword
 enum VpdRingClass
 {
     VPD_RING_CLASS_NEST = 0,   // Indicates NEST [common] rings, except GPTR #G rings.
-    VPD_RING_CLASS_GPTR = 1,   // Indicates GPTR #G [common]rings
-    VPD_RING_CLASS_EQ = 2,     // Indicates EQ [common] rings
-    VPD_RING_CLASS_EX = 3,     // Indicates EX [common] rings
-    VPD_RING_CLASS_EC = 4,     // Indicates EC [common] rings
-    VPD_RING_CLASS_EQ_INS = 5, // Indicates EQ instance rings
-    VPD_RING_CLASS_EX_INS = 6, // Indicates EX instance rings
-    VPD_RING_CLASS_EC_INS = 7, // Indicates EC instance rings
-    VPD_RING_CLASS_LAST = 8,
+    VPD_RING_CLASS_GPTR_NEST = 1,   // Indicates GPTR #G [common]rings-NEST
+    VPD_RING_CLASS_GPTR_EQ = 2,   // Indicates GPTR #G [common]rings-EQ
+    VPD_RING_CLASS_GPTR_EX = 3,   // Indicates GPTR #G [common]rings-EX
+    VPD_RING_CLASS_GPTR_EC = 4,   // Indicates GPTR #G [common]rings-EC
+    VPD_RING_CLASS_EQ = 5,     // Indicates EQ [common] rings
+    VPD_RING_CLASS_EX = 6,     // Indicates EX [common] rings
+    VPD_RING_CLASS_EC = 7,     // Indicates EC [common] rings
+    VPD_RING_CLASS_EQ_INS = 8, // Indicates EQ instance rings
+    VPD_RING_CLASS_EX_INS = 9, // Indicates EX instance rings
+    VPD_RING_CLASS_EC_INS = 10, // Indicates EC instance rings
+    VPD_RING_CLASS_LAST = 11,
 };
 
 
diff --git a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.C b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.C
index fcf89ad4d..39d6ddb65 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.C
@@ -992,10 +992,7 @@ rs4_extract_cmsk(CompressedScanData* i_rs4,
     return SCAN_COMPRESSION_OK;
 }
 
-
-// This function prints out the raw decompressed ring content in the same
-//   format that it appears as in EKB's ifCompiler generated raw ring
-//   files, i.e. *.bin.srd (DATA) and *.bin.srd.bitsModified (CARE).
+// Prints out the raw decompressed RS4 ring content
 void print_raw_ring( uint8_t*  data,
                      uint32_t  bits )
 {
diff --git a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
index a42af36d9..36486de37 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
@@ -279,9 +279,15 @@ int rs4_extract_cmsk(CompressedScanData* i_rs4,
 
 #endif  // __ASSEMBLER__
 
-// This function prints out the raw decompressed ring content in the same
-//   format that it appears as in EKB's ifCompiler generated raw ring
-//   files, i.e. *.bin.srd (DATA) and *.bin.srd.bitsModified (CARE).
+/// Function: print_raw_ring()
+/// @brief: Prints out the raw decompressed RS4 ring content.
+///
+/// Desc.:It displays the raw decompressed ring content in the same
+///       format that it appears as in EKB's ifCompiler generated raw ring
+///       files, i.e. *.bin.srd (DATA) and *.bin.srd.bitsModified (CARE).
+///
+/// \param[in] data Its Data (*.bin.srd) or Care (*.bin.srd.bitsModified)
+/// \param[in] bits Length of raw ring in bits
 void print_raw_ring( uint8_t*  data, uint32_t  bits);