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author | Sangeetha T S <sangeet2@in.ibm.com> | 2016-02-29 11:25:45 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-16 11:53:43 -0400 |
commit | c421250f0b3b68cfc1eaa90ac130058df988f07b (patch) | |
tree | 1d6a4b0a32a687b336c43a90d934debe4778d252 /src/import/chips/p9 | |
parent | 746a88141fa0213828b0a19fa52ef29041eecb60 (diff) | |
download | talos-hostboot-c421250f0b3b68cfc1eaa90ac130058df988f07b.tar.gz talos-hostboot-c421250f0b3b68cfc1eaa90ac130058df988f07b.zip |
p9_pm_fir_class Level 1, 2
Change-Id: Icf1bfe46a490d04f9035c7b825cef34b880fe705
Original-Change-Id: Id4b1c67fed843b4d5634d6035bdea839eadfdf4b
RTC: 147993
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21439
Tested-by: Hostboot CI
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25901
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H | 559 |
1 files changed, 559 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H new file mode 100644 index 000000000..f3bce06f5 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_fir_class.H @@ -0,0 +1,559 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: chips/p9/procedures/hwp/pm/p9_pm_fir_class.H $ */ +/* */ +/* IBM CONFIDENTIAL */ +/* */ +/* EKB Project */ +/* */ +/* COPYRIGHT 2015,2016 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* The source code for this program is not published or otherwise */ +/* divested of its trade secrets, irrespective of what has been */ +/* deposited with the U.S. Copyright Office. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file p9_pm_fir_class.H +/// @brief common .H file for all FIRINITS +/// +// *HWP HWP Owner: Amit Kumar <akumar3@us.ibm.com> +// *HWP Backup HWP Owner: Greg Still <stillgs@us.ibm.com> +// *HWP FW Owner: Sangeetha T S <sangeet2@in.ibm.com> +// *HWP Team: PM +// *HWP Level: 2 +// *HWP Consumed by: FSP:HS + +#ifndef _P9_PM_FIR_CLASS_H_ +#define _P9_PM_FIR_CLASS_H_ +//------------------------------------------------------------------------------ +// Includes +//------------------------------------------------------------------------------ +#include <fapi2.H> +#include <p9_pm.H> +#include <p9_perv_scom_addresses.H> +#include <p9_quad_scom_addresses.H> +#include <p9_misc_scom_addresses.H> + +namespace p9pmFIR +{ + +//-------------------------------------------------------------------------- +// Constants and class definition +//-------------------------------------------------------------------------- + +//FIR types +enum FIRType +{ + FIRTYPE_OCC_LFIR = 0x00000001, // OCC LFIR + FIRTYPE_PBA_LFIR = 0x00000002, // PBA LFIR + FIRTYPE_CME_LFIR = 0x00000003 // CME LFIR +}; + +enum regType +{ + REG_ACTION0, + REG_ACTION1, + REG_FIR, + REG_FIRMASK, + REG_ALL +}; + +//FIR register offset from base +enum FIROffset +{ + BASE_WAND_INCR = 1, + BASE_WOR_INCR = 2, + MASK_INCR = 3, + MASK_WAND_INCR = 4, + MASK_WOR_INCR = 5, + ACTION0_INCR = 6, + ACTION1_INCR = 7 +}; +/* + +typedef struct FIRDetails_t +{ + uint32_t bit_number; + char bit_name[64]; +}; + +typedef struct FIRDef_t +{ + uint64_t base_fir_address; + char fir_name[64]; + uint32_t number_of_bits; + std::vectorchar* bit_names[]; +}; +*/ + +template <FIRType Ftype> +class PMFir +{ + fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> iv_target; + + // Buffers to hold the FIR, masks and action register data + fapi2::buffer<uint64_t> iv_fir; + fapi2::buffer<uint64_t> iv_action0; + fapi2::buffer<uint64_t> iv_action1; + fapi2::buffer<uint64_t> iv_mask; + + // Addresses of the FIRs, Masks, and action registers + uint64_t iv_fir_address; + uint64_t iv_action0_address; + uint64_t iv_action1_address; + uint64_t iv_mask_address; + + // Flags if class value was modified + bool iv_fir_write; + bool iv_action0_write; + bool iv_action1_write; + bool iv_mask_write; + + public: + + PMFir(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target); + + fapi2::ReturnCode get(const regType i_reg); + + fapi2::ReturnCode put(); + + fapi2::ReturnCode setCheckStop(const uint32_t i_bit); + + fapi2::ReturnCode setRecvAttn(const uint32_t i_bit); + + fapi2::ReturnCode setRecvIntr(const uint32_t i_bit); + + fapi2::ReturnCode setMalfAlert(const uint32_t i_bit); + + fapi2::ReturnCode mask(const uint32_t i_bit); + + fapi2::ReturnCode unmask(const uint32_t i_bit); + + fapi2::ReturnCode setAllRegBits(const regType i_reg); + + fapi2::ReturnCode clearAllRegBits(const regType i_reg); + + fapi2::ReturnCode saveMask(); + + fapi2::ReturnCode restoreSavedMask(); + +}; + + +/// @brief Base constructor for FIR class to build object based on FIR type +/// +/// @param [in] <F> FIR type (template parameter) +/// @param [in] i_target Chip Target +/// +template < FIRType Ftype > +PMFir<Ftype>::PMFir( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) +{ +} + +/// @brief The constructor for FIR class for OCC FIR +/// +/// @param [in] <FIRTYPE_OCC_LFIR> FIR Type for OCC +/// @param [in] i_target Chip Target +/// +template <> +PMFir<FIRTYPE_OCC_LFIR>::PMFir( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) +{ + iv_fir_address = PERV_TP_OCC_SCOM_OCCLFIR; + iv_action0_address = iv_fir_address + ACTION0_INCR; + iv_action1_address = iv_fir_address + ACTION1_INCR; + iv_mask_address = iv_fir_address + MASK_INCR; + iv_target = i_target; + iv_fir_write = false; + iv_action0_write = false; + iv_action1_write = false; + iv_mask_write = false; +} + +/// @brief The constructor for FIR class for PBA FIR +/// +/// @param [in] <FIRTYPE_PBA_LFIR> FIR Type for PBA +/// @param [in] i_target Chip Target +/// +template <> +PMFir<FIRTYPE_PBA_LFIR>::PMFir( + const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target) +{ + iv_fir_address = PU_PBAFIR; + iv_action0_address = iv_fir_address + ACTION0_INCR; + iv_action1_address = iv_fir_address + ACTION1_INCR; + iv_mask_address = iv_fir_address + MASK_INCR; + iv_target = i_target; + iv_fir_write = false; + iv_action0_write = false; + iv_action1_write = false; + iv_mask_write = false; +} + +/// @brief Get the values of FIRs, FIR masks & FIR actions +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::get(const regType i_reg) +{ + + if (i_reg == REG_FIR || i_reg == REG_ALL) + { + FAPI_TRY(fapi2::getScom(iv_target, iv_fir_address, iv_fir)); + iv_fir_write = false; + } + + if(i_reg == REG_ACTION0 || i_reg == REG_ALL) + { + FAPI_TRY(fapi2::getScom(iv_target, iv_action0_address, iv_action0)); + iv_action0_write = false; + } + + if(i_reg == REG_ACTION1 || i_reg == REG_ALL) + { + FAPI_TRY(fapi2::getScom(iv_target, iv_action1_address, iv_action1)); + iv_action1_write = false; + } + + if(i_reg == REG_FIRMASK || i_reg == REG_ALL) + { + FAPI_TRY(fapi2::getScom(iv_target, iv_mask_address, iv_mask)); + iv_mask_write = false; + } + +fapi_try_exit: + return fapi2::current_err; +} + + +/// @brief Put the modified values to the registers +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::put() +{ + uint64_t l_address = 0; + + if (iv_fir_write == true) + { + l_address = iv_fir_address + BASE_WOR_INCR; + FAPI_TRY(putScom(iv_target, l_address, iv_fir)); + } + + if (iv_action0_write == true) + { + FAPI_TRY(putScom(iv_target, iv_action0_address, + iv_action0)); + } + + if (iv_action1_write == true) + { + FAPI_TRY(putScom(iv_target, iv_action1_address, + iv_action1)); + } + + if (iv_mask_write == true) + { + l_address = iv_fir_address + MASK_WOR_INCR; + FAPI_TRY(putScom(iv_target, l_address, iv_mask)); + } + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Set FIR bit action to checkstop (00) +/// +/// @param [in] i_bit FIR bit to act upon +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::setCheckStop(const uint32_t i_bit) +{ + FAPI_TRY(iv_action0.clearBit(i_bit)); + FAPI_TRY(iv_action1.clearBit(i_bit)); + FAPI_TRY(iv_mask.clearBit(i_bit)); + iv_action0_write = true; + iv_action1_write = true; + iv_mask_write = true; + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Set FIR bit action to recoverable attention (01) +/// +/// @param [in] i_bit FIR bit to act upon +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::setRecvAttn(const uint32_t i_bit) +{ + FAPI_TRY(iv_action0.clearBit(i_bit)); + FAPI_TRY(iv_action1.setBit(i_bit)); + FAPI_TRY(iv_mask.clearBit(i_bit)); + iv_action0_write = true; + iv_action1_write = true; + iv_mask_write = true; + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Set FIR bit action to recoverable interrupt (10) +/// +/// @param [in] i_bit FIR bit to act upon +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::setRecvIntr(const uint32_t i_bit) +{ + FAPI_TRY(iv_action0.setBit(i_bit)); + FAPI_TRY(iv_action1.clearBit(i_bit)); + FAPI_TRY(iv_mask.clearBit(i_bit)); + iv_action0_write = true; + iv_action1_write = true; + iv_mask_write = true; + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Set FIR bit action to malfunction alert (11) +/// +/// @param [in] i_bit FIR bit to act upon +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::setMalfAlert(const uint32_t i_bit) +{ + FAPI_TRY(iv_action0.setBit(i_bit)); + FAPI_TRY(iv_action1.setBit(i_bit)); + FAPI_TRY(iv_mask.clearBit(i_bit)); + iv_action0_write = true; + iv_action1_write = true; + iv_mask_write = true; + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Mask a given bit +/// +/// @param [in] i_bit FIR bit to act upon +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::mask(const uint32_t i_bit) +{ + FAPI_TRY(iv_mask.setBit(i_bit)); + iv_mask_write = true; + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief unmask a given bit +/// +/// @param [in] i_bit FIR bit to act upon +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::unmask(const uint32_t i_bit) +{ + FAPI_TRY(iv_mask.clearBit(i_bit)); + iv_mask_write = true; + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Set all bits of FIR/MASK/Action +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::setAllRegBits(const regType i_reg) +{ + if (i_reg == REG_FIR || i_reg == REG_ALL) + { + iv_fir.flush<1>(); + iv_fir_write = true; + } + + if(i_reg == REG_ACTION0 || i_reg == REG_ALL) + { + iv_action0.flush<1>(); + iv_action0_write = true; + } + + if(i_reg == REG_ACTION1 || i_reg == REG_ALL) + { + iv_action1.flush<1>(); + iv_action1_write = true; + } + + if(i_reg == REG_FIRMASK || i_reg == REG_ALL) + { + iv_mask.flush<1>(); + iv_mask_write = true; + } + + return fapi2::current_err; +} + +/// @brief Clear all bits of FIR/MASK/Action +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <FIRType Ftype> +fapi2::ReturnCode PMFir<Ftype>::clearAllRegBits(const regType i_reg) +{ + if (i_reg == REG_FIR || i_reg == REG_ALL) + { + iv_fir.flush<0>(); + iv_fir_write = true; + } + + if(i_reg == REG_ACTION0 || i_reg == REG_ALL) + { + iv_action0.flush<0>(); + iv_action0_write = true; + } + + if(i_reg == REG_ACTION1 || i_reg == REG_ALL) + { + iv_action1.flush<0>(); + iv_action1_write = true; + } + + if(i_reg == REG_FIRMASK || i_reg == REG_ALL) + { + iv_mask.flush<0>(); + iv_mask_write = true; + } + + return fapi2::current_err; +} + +/// @brief Base function to save the present FIR mask into attribute +/// +/// @param [in] <Ftype> FIR Type +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template < FIRType Ftype > +fapi2::ReturnCode PMFir<Ftype>::saveMask() +{ + return fapi2::current_err; +} + +/// @brief Save the present OCC LFIR mask into attribute +/// +/// @param [in] <FIRTYPE_OCC_LFIR> OCC FIR Type +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <> +fapi2::ReturnCode PMFir<FIRTYPE_OCC_LFIR>::saveMask() +{ + uint32_t l_mask; + iv_mask.extract<0, 32>(l_mask); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_OCC_LFIR, iv_target, l_mask), + "ERROR: Failed to save OCC LFIR"); + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Save the present PBAC LFIR mask into attribute +/// +/// @param [in] <FIRTYPE_PBA_LFIR> PBA FIR Type +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <> +fapi2::ReturnCode PMFir<FIRTYPE_PBA_LFIR>::saveMask() +{ + uint32_t l_mask; + iv_mask.extract<0, 32>(l_mask); + FAPI_TRY(FAPI_ATTR_SET(fapi2::ATTR_PBA_LFIR, iv_target, l_mask), + "ERROR: Failed to save PBA LFIR"); +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Base function to restore saved value to the FIR Mask +/// +/// @param [in] <Ftype> FIR Type +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template < FIRType Ftype > +fapi2::ReturnCode PMFir<Ftype>::restoreSavedMask() +{ + return fapi2::current_err; +} + +/// @brief Restore saved OCC LFIR Mask +/// +/// @param [in] <FIRTYPE_OCC_LFIR> OCC LFIR type +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <> +fapi2::ReturnCode PMFir<FIRTYPE_OCC_LFIR>::restoreSavedMask() +{ + uint32_t l_mask; + uint32_t l_tempMask; + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_OCC_LFIR, iv_target, l_mask), + "ERROR: Failed to retrieve saved OCC LFIR"); + iv_mask.extract<0, 32>(l_tempMask); + l_mask |= l_tempMask; + iv_mask.insertFromRight<0, 32>(l_mask); + iv_mask_write = true; + +fapi_try_exit: + return fapi2::current_err; +} + +/// @brief Restore saved PBA LFIR Mask +/// +/// @param [in] <FIRTYPE_PBA_LFIR> PBA LFIR type +/// +/// @return FAPI2_RC_SUCCESS if success, else error code +/// +template <> +fapi2::ReturnCode PMFir<FIRTYPE_PBA_LFIR>::restoreSavedMask() +{ + uint32_t l_mask; + uint32_t l_tempMask; + + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PBA_LFIR, iv_target, l_mask), + "ERROR: Failed to retrieve saved PBA LFIR"); + iv_mask.extract<0, 32>(l_tempMask); + l_mask |= l_tempMask; + iv_mask.insertFromRight<0, 32>(l_mask); + iv_mask_write = true; + +fapi_try_exit: + return fapi2::current_err; +} + +} +#endif //_P9_PM_FIR_CLASS_H_ |