Additional risk level support - (step 1) Backward compatibility

The purpose of this commit is to avoid a coreq situation by
ensuring this commit is fully propagated through our repos and
test drivers before introducing the change to the new HW image
with two RLs.

The commit enables simultaneous support for producing a HW image
and retrieving rings from an image that has either one or two risk
level (RL) rings in the .rings section. The commit however does
NOT actually, yet, make any changes to the image which is the
aim of the (step 2) commit 53292. Nor does this commit generate
any raw ring files or process any RL2 level rings yet. Again this
will happen in 53292.

The commit also includes,
- various related cleanups in data naming and ring file processing,
- some data and invironment specific parts in ring_apply.C have
  been moved to common_ringId.C.

Key_Cronus_Test=XIP_REGRESS

HW-Image-Prereq=53292
- This commit (52659) must be fully merged before merging 53292.

Change-Id: I402d53c4a3ca6a084c958321069cc6f60e04ad24
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53019
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>

3 files changed, 24 insertions, 23 deletions

diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.C b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
index 76aab64cd..35aed502f 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -61,7 +61,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"perv_repr"             , 0x13, 0x01, 0x01, VPD_RING    , 0x01034006},
     {"occ_repr"              , 0x14, 0x01, 0x01, VPD_RING    , 0x01030806},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -85,7 +85,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"n0_nx_repr"          , 0x0a, 0x02, 0x02, VPD_RING    , 0x02032006},
     {"n0_cxa0_repr"        , 0x0b, 0x02, 0x02, VPD_RING    , 0x02031006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID};
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT};
 };
 
 
@@ -113,7 +113,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"n1_ioo1_repr"        , 0x0e, 0x03, 0x03, VPD_RING    , 0x03030406},
     {"n1_mcs23_repr"       , 0x0f, 0x03, 0x03, VPD_RING    , 0x03030206},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID};
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT};
 };
 
 
@@ -137,7 +137,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"n2_cxa1_repr"        , 0x0a, 0x04, 0x04, VPD_RING    , 0x04032006},
     {"n2_psi_repr"         , 0x0b, 0x04, 0x04, VPD_RING    , 0x04030206},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -162,7 +162,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"n3_mcs01_repr"       , 0x0b, 0x05, 0x05, VPD_RING    , 0x05030106},
     {"n3_np_repr"          , 0x0c, 0x05, 0x05, VPD_RING    , 0x05030806},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -193,7 +193,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"xb_io1_repr"         , 0x15, 0x06, 0x06, VPD_RING    , 0x06031106},
     {"xb_io2_repr"         , 0x16, 0x06, 0x06, VPD_RING    , 0x06030886},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -224,7 +224,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"mc_iom01_repr"       , 0x11, 0x07, 0x08, VPD_RING    , 0x07031006},
     {"mc_iom23_repr"       , 0x12, 0x07, 0x08, VPD_RING    , 0x07030806},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -244,7 +244,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"ob0_repr"              , 0x07, 0x09, 0x09, VPD_RING    , 0x09037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -264,7 +264,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"ob1_repr"              , 0x07, 0x0a, 0x0a, VPD_RING    , 0x0A037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -284,7 +284,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"ob2_repr"              , 0x07, 0x0b, 0x0b, VPD_RING    , 0x0B037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -304,7 +304,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"ob3_repr"              , 0x07, 0x0c, 0x0c, VPD_RING    , 0x0C037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -322,7 +322,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"pci0_repr"           , 0x05, 0x0d, 0x0d, VPD_RING    , 0x0D037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -340,7 +340,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"pci1_repr"           , 0x05, 0x0e, 0x0e, VPD_RING    , 0x0E037806},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -358,7 +358,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     {"pci2_repr"           , 0x05, 0x0F, 0x0F, VPD_RING    , 0x0F037C06},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, RL, NOT_VALID };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_RL, UNDEFINED_RING_VARIANT, UNDEFINED_RING_VARIANT };
 };
 
 
@@ -441,7 +441,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
     {"ex_l3_refr_repr"            , 0x45, 0x10, 0x1b, VPD_RING    , 0x10030046},
     {"ex_l3_refr_time"            , 0x46, 0x10, 0x1b, VPD_RING    , 0x10030047},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, CC, RL };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2 };
 };
 
 
@@ -460,7 +460,7 @@ const GenRingIdList RING_ID_LIST_INSTANCE[] =
 {
     { "ec_repr"            , 0x05, 0x20, 0x37, VPD_RING    , 0x20037006},
 };
-const RingVariantOrder RING_VARIANT_ORDER[] = { BASE, CC, RL };
+const RingVariantOrder RING_VARIANT_ORDER[] = { RV_BASE, RV_CC, RV_RL, RV_RL2 };
 };
 
 
@@ -475,14 +475,14 @@ ChipletType_t P9_RID::ringid_get_chiplet(RingId_t i_ringId)
 }
 
 void P9_RID::ringid_get_chiplet_properties(
-    ChipletType_t      i_chiplet,
+    ChipletType_t      i_chipletType,
     ChipletData_t**    o_cpltData,
     GenRingIdList**    o_ringComm,
     GenRingIdList**    o_ringInst,
     RingVariantOrder** o_varOrder,
     uint8_t*           o_varNumb)
 {
-    switch (i_chiplet)
+    switch (i_chipletType)
     {
         case PERV_TYPE :
             *o_cpltData = (ChipletData_t*)   &PERV::g_chipletData;
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ringId.H b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
index 54d23e1ec..f0941534e 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ringId.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ringId.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -686,7 +686,7 @@ static const ChipletData_t g_chipletData =
     66, // 66 common rings for Quad chiplet.
     5,  // 5 instance specific rings for each EQ chiplet
     9,  // 9 different rings since 2 per EX ring and 1 per EQ
-    3,  // 3 ring variants: BASE, CC, RL
+    4,  // 4 ring variants: BASE, CC, RL, RL2
 };
 }; // end of namespace EQ
 
@@ -711,7 +711,7 @@ static const ChipletData_t g_chipletData =
     6,  // 6 common rings for Core chiplet
     1,  // 1 instance specific ring for each Core chiplet
     1,
-    3,  // 3 ring variants: BASE, CC, RL
+    4,  // 4 ring variants: BASE, CC, RL, RL2
 };
 }; // end of namespace EC
 
@@ -1252,7 +1252,7 @@ ringid_get_chiplet(RingId_t i_ringId);
 // as determined by ringId
 void
 ringid_get_chiplet_properties(
-    ChipletType_t      i_chiplet,
+    ChipletType_t      i_chipletType,
     ChipletData_t**    o_cpltData,
     GenRingIdList**    o_ringComm,
     GenRingIdList**    o_ringInst,
diff --git a/src/import/chips/p9/utils/imageProcs/p9_tor.C b/src/import/chips/p9/utils/imageProcs/p9_tor.C
index 3b3a5ec54..7212b4583 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_tor.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_tor.C
@@ -92,6 +92,7 @@ int get_ring_from_ring_section( void*           i_ringSection,     // Ring secti
     {
         rc = ringid_get_properties( chipType,
                                     torMagic,
+                                    torHeader->version,
                                     iCplt,
                                     &cpltData,
                                     &ringIdListCommon,