GPTR/Overlays stage-2 support

-Updated ringClass to include Gptr for Nest/EQ/EX/EC to support
CME/SGPE.
- Bug fixes:
  - big endian to local host endian conversion
  - now also processing Gptr rings in RT_CME/SGPE sysPhases
  - improved error checking, error capturing and trace outs

Change-Id: Idfc19bdf1b7187d6f75c459f7ddbeda80ccfec28
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43080
Reviewed-by: Claus M. Olsen <cmolsen@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43082
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

5 files changed, 70 insertions, 62 deletions

diff --git a/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H b/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
index 181aaba3f..048fd36e7 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_infrastruct_help.H
@@ -54,6 +54,8 @@ const uint32_t  MAX_NOOF_DD_LEVELS_IN_IMAGE = 20;
 #define NUM_OF_QUADS     6
 #define CORES_PER_QUAD  (NUM_OF_CORES/NUM_OF_QUADS)
 
+#define INFRASTRUCT_RC_SUCCESS 0
+
 enum SYSPHASE
 {
     SYSPHASE_HB_SBE = 0,
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
index c14f84b05..3e9a12c3e 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.C
@@ -38,82 +38,82 @@ const RingIdList RING_ID_LIST_PDG[] =
 {
     /* ringName           ringId  chipletId  vpdKeyword    */
     /*                            min   max                 */
-    {"perv_gptr",            perv_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"perv_gptr",            perv_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"perv_time",            perv_time, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"occ_gptr",              occ_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"occ_gptr",              occ_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"occ_time",              occ_time, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"perv_ana_gptr",    perv_ana_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"perv_pll_gptr",    perv_pll_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"n0_gptr",                n0_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"perv_ana_gptr",    perv_ana_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"perv_pll_gptr",    perv_pll_gptr, 0x01, 0x01, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"n0_gptr",                n0_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n0_time",                n0_time, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n0_nx_gptr",          n0_nx_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n0_nx_gptr",          n0_nx_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n0_nx_time",          n0_nx_time, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n0_cxa0_gptr",      n0_cxa0_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n0_cxa0_gptr",      n0_cxa0_gptr, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n0_cxa0_time",      n0_cxa0_time, 0x02, 0x02, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n1_gptr",                n1_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n1_gptr",                n1_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n1_time",                n1_time, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n1_ioo0_gptr",      n1_ioo0_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n1_ioo0_gptr",      n1_ioo0_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n1_ioo0_time",      n1_ioo0_time, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n1_ioo1_gptr",      n1_ioo1_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n1_ioo1_gptr",      n1_ioo1_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n1_ioo1_time",      n1_ioo1_time, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n1_mcs23_gptr",    n1_mcs23_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n1_mcs23_gptr",    n1_mcs23_gptr, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n1_mcs23_time",    n1_mcs23_time, 0x03, 0x03, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n2_gptr",                n2_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n2_gptr",                n2_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n2_time",                n2_time, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n2_cxa1_gptr",      n2_cxa1_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n2_cxa1_gptr",      n2_cxa1_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n2_cxa1_time",      n2_cxa1_time, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n2_psi_gptr",        n2_psi_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"n3_gptr",                n3_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n2_psi_gptr",        n2_psi_gptr, 0x04, 0x04, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"n3_gptr",                n3_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n3_time",                n3_time, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n3_mcs01_gptr",    n3_mcs01_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n3_mcs01_gptr",    n3_mcs01_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n3_mcs01_time",    n3_mcs01_time, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"n3_np_gptr",          n3_np_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"n3_np_gptr",          n3_np_gptr, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"n3_np_time",          n3_np_time, 0x05, 0x05, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_gptr",                xb_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_gptr",                xb_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"xb_time",                xb_time, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_io0_gptr",        xb_io0_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_io0_gptr",        xb_io0_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"xb_io0_time",        xb_io0_time, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_io1_gptr",        xb_io1_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_io1_gptr",        xb_io1_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"xb_io1_time",        xb_io1_time, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_io2_gptr",        xb_io2_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_io2_gptr",        xb_io2_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"xb_io2_time",        xb_io2_time, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"xb_pll_gptr",        xb_pll_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"mc_gptr",                mc_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"xb_pll_gptr",        xb_pll_gptr, 0x06, 0x06, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"mc_gptr",                mc_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"mc_time",                mc_time, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"mc_iom01_gptr",    mc_iom01_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"mc_iom23_gptr",    mc_iom23_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"mc_pll_gptr",        mc_pll_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ob0_gptr",              ob0_gptr, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"mc_iom01_gptr",    mc_iom01_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"mc_iom23_gptr",    mc_iom23_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"mc_pll_gptr",        mc_pll_gptr, 0x07, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"ob0_gptr",              ob0_gptr, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"ob0_time",              ob0_time, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"ob0_pll_gptr",      ob0_pll_gptr, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ob1_gptr",              ob1_gptr, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ob0_pll_gptr",      ob0_pll_gptr, 0x09, 0x09, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"ob1_gptr",              ob1_gptr, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"ob1_time",              ob1_time, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"ob1_pll_gptr",      ob1_pll_gptr, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ob2_gptr",              ob2_gptr, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ob1_pll_gptr",      ob1_pll_gptr, 0x0A, 0x0A, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"ob2_gptr",              ob2_gptr, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"ob2_time",              ob2_time, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"ob2_pll_gptr",      ob2_pll_gptr, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ob3_gptr",              ob3_gptr, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ob2_pll_gptr",      ob2_pll_gptr, 0x0B, 0x0B, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"ob3_gptr",              ob3_gptr, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"ob3_time",              ob3_time, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"ob3_pll_gptr",      ob3_pll_gptr, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"pci0_gptr",            pci0_gptr, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ob3_pll_gptr",      ob3_pll_gptr, 0x0C, 0x0C, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"pci0_gptr",            pci0_gptr, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"pci0_time",            pci0_time, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"pci0_pll_gptr",    pci0_pll_gptr, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"pci1_gptr",            pci1_gptr, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"pci0_pll_gptr",    pci0_pll_gptr, 0x0D, 0x0D, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"pci1_gptr",            pci1_gptr, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"pci1_time",            pci1_time, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"pci1_pll_gptr",    pci1_pll_gptr, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"pci2_gptr",            pci2_gptr, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"pci1_pll_gptr",    pci1_pll_gptr, 0x0E, 0x0E, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"pci2_gptr",            pci2_gptr, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
     {"pci2_time",            pci2_time, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_NEST},
-    {"pci2_pll_gptr",    pci2_pll_gptr, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"eq_gptr",                eq_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"pci2_pll_gptr",    pci2_pll_gptr, 0x0F, 0x0F, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_NEST},
+    {"eq_gptr",                eq_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EQ},
     {"eq_time",                eq_time, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EQ},
-    {"ex_l3_gptr",          ex_l3_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ex_l3_gptr",          ex_l3_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EX},
     {"ex_l3_time",          ex_l3_time, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EX},
-    {"ex_l2_gptr",          ex_l2_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ex_l2_gptr",          ex_l2_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EX},
     {"ex_l2_time",          ex_l2_time, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EX},
-    {"ex_l3_refr_gptr", ex_l3_refr_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"eq_ana_gptr",        eq_ana_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"eq_dpll_gptr",      eq_dpll_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
-    {"ec_gptr",                ec_gptr, 0x20, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR},
+    {"ex_l3_refr_gptr", ex_l3_refr_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EX},
+    {"eq_ana_gptr",        eq_ana_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EQ},
+    {"eq_dpll_gptr",      eq_dpll_gptr, 0x10, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EQ},
+    {"ec_gptr",                ec_gptr, 0x20, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_GPTR_EC},
     {"ec_time",                ec_time, 0x20, 0xFF, VPD_KEYWORD_PDG, VPD_RING_CLASS_EC},
 };
 
diff --git a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
index 17e430761..6117a7bf9 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_ring_identification.H
@@ -83,14 +83,17 @@ enum VpdKeyword
 enum VpdRingClass
 {
     VPD_RING_CLASS_NEST = 0,   // Indicates NEST [common] rings, except GPTR #G rings.
-    VPD_RING_CLASS_GPTR = 1,   // Indicates GPTR #G [common]rings
-    VPD_RING_CLASS_EQ = 2,     // Indicates EQ [common] rings
-    VPD_RING_CLASS_EX = 3,     // Indicates EX [common] rings
-    VPD_RING_CLASS_EC = 4,     // Indicates EC [common] rings
-    VPD_RING_CLASS_EQ_INS = 5, // Indicates EQ instance rings
-    VPD_RING_CLASS_EX_INS = 6, // Indicates EX instance rings
-    VPD_RING_CLASS_EC_INS = 7, // Indicates EC instance rings
-    VPD_RING_CLASS_LAST = 8,
+    VPD_RING_CLASS_GPTR_NEST = 1,   // Indicates GPTR #G [common]rings-NEST
+    VPD_RING_CLASS_GPTR_EQ = 2,   // Indicates GPTR #G [common]rings-EQ
+    VPD_RING_CLASS_GPTR_EX = 3,   // Indicates GPTR #G [common]rings-EX
+    VPD_RING_CLASS_GPTR_EC = 4,   // Indicates GPTR #G [common]rings-EC
+    VPD_RING_CLASS_EQ = 5,     // Indicates EQ [common] rings
+    VPD_RING_CLASS_EX = 6,     // Indicates EX [common] rings
+    VPD_RING_CLASS_EC = 7,     // Indicates EC [common] rings
+    VPD_RING_CLASS_EQ_INS = 8, // Indicates EQ instance rings
+    VPD_RING_CLASS_EX_INS = 9, // Indicates EX instance rings
+    VPD_RING_CLASS_EC_INS = 10, // Indicates EC instance rings
+    VPD_RING_CLASS_LAST = 11,
 };
 
 
diff --git a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.C b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.C
index fcf89ad4d..39d6ddb65 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.C
+++ b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.C
@@ -992,10 +992,7 @@ rs4_extract_cmsk(CompressedScanData* i_rs4,
     return SCAN_COMPRESSION_OK;
 }
 
-
-// This function prints out the raw decompressed ring content in the same
-//   format that it appears as in EKB's ifCompiler generated raw ring
-//   files, i.e. *.bin.srd (DATA) and *.bin.srd.bitsModified (CARE).
+// Prints out the raw decompressed RS4 ring content
 void print_raw_ring( uint8_t*  data,
                      uint32_t  bits )
 {
diff --git a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
index a42af36d9..36486de37 100644
--- a/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
+++ b/src/import/chips/p9/utils/imageProcs/p9_scan_compression.H
@@ -279,9 +279,15 @@ int rs4_extract_cmsk(CompressedScanData* i_rs4,
 
 #endif  // __ASSEMBLER__
 
-// This function prints out the raw decompressed ring content in the same
-//   format that it appears as in EKB's ifCompiler generated raw ring
-//   files, i.e. *.bin.srd (DATA) and *.bin.srd.bitsModified (CARE).
+/// Function: print_raw_ring()
+/// @brief: Prints out the raw decompressed RS4 ring content.
+///
+/// Desc.:It displays the raw decompressed ring content in the same
+///       format that it appears as in EKB's ifCompiler generated raw ring
+///       files, i.e. *.bin.srd (DATA) and *.bin.srd.bitsModified (CARE).
+///
+/// \param[in] data Its Data (*.bin.srd) or Care (*.bin.srd.bitsModified)
+/// \param[in] bits Length of raw ring in bits
 void print_raw_ring( uint8_t*  data, uint32_t  bits);