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authorMilton Miller <miltonm@us.ibm.com>2019-08-19 21:00:25 -0500
committerNicholas E Bofferding <bofferdn@us.ibm.com>2019-09-05 14:03:01 -0500
commitf7dab51ab5057e622495c5762ac3ba12b6d8b59f (patch)
tree89cc8e9c8606579bd6f28aab52be0c4f4c81dd14 /src/import/chips/p9/procedures
parent77ab77a26dd81cc05a198153bf0d29c487d326e4 (diff)
downloadtalos-hostboot-f7dab51ab5057e622495c5762ac3ba12b6d8b59f.tar.gz
talos-hostboot-f7dab51ab5057e622495c5762ac3ba12b6d8b59f.zip
p9_tod_setup: always set edge doubling
All chips, both master and slave, need to have the double edge disabled if using the lpc_clock for the TOD reference input, so always call configure_m_path_ctrl_reg and skip the other setup when not configuring the master drawer master tod (mdmt) path. Change-Id: Id9f46d0cbddc61ff1c4c41acb701413a8678dae2 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82495 Dev-Ready: Joseph J McGill <jmcgill@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Douglas Holtsinger <douglas.holtsinger@ibm.com> Reviewed-by: Joachim Fenkes <fenkes@de.ibm.com> Reviewed-by: Joseph J McGill <jmcgill@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82564 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C145
1 files changed, 74 insertions, 71 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
index 4558f282c..18c0079b0 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
@@ -782,6 +782,8 @@ fapi2::ReturnCode configure_m_path_ctrl_reg(
fapi2::buffer<uint64_t> l_root_ctrl8_reg = 0;
bool l_tod_on_lpc_clock = false;
+ const bool is_mdmt = (i_tod_node->i_tod_master && i_tod_node->i_drawer_master);
+
// Read ROOT_CTRL8 to determine TOD input clock selection
FAPI_TRY(fapi2::getScom(*(i_tod_node->i_target),
PERV_ROOT_CTRL8_SCOM,
@@ -796,87 +798,91 @@ fapi2::ReturnCode configure_m_path_ctrl_reg(
l_m_path_ctrl_reg),
"Error from getScom (PERV_TOD_M_PATH_CTRL_REG)!");
+ // Configure single or dual edge detect based on tod clock select
l_m_path_ctrl_reg.writeBit<PERV_TOD_M_PATH_CTRL_REG_STEP_CREATE_DUAL_EDGE_DISABLE>(l_tod_on_lpc_clock);
- // Configure Master OSC0/OSC1 path
- FAPI_DBG("Configuring Master OSC path in PERV_TOD_M_PATH_CTRL_REG");
-
- if (i_osc_sel == TOD_OSC_0 ||
- i_osc_sel == TOD_OSC_0_AND_1 ||
- i_osc_sel == TOD_OSC_0_AND_1_SEL_0 ||
- i_osc_sel == TOD_OSC_0_AND_1_SEL_1)
+ if (is_mdmt)
{
- FAPI_DBG("OSC0 is valid; master path-0 will be configured.");
+ // Configure Master OSC0/OSC1 path
+ FAPI_DBG("Configuring Master OSC path in PERV_TOD_M_PATH_CTRL_REG");
- // OSC0 is connected
- l_m_path_ctrl_reg.clearBit<PERV_TOD_M_PATH_CTRL_REG_0_OSC_NOT_VALID>();
+ if (i_osc_sel == TOD_OSC_0 ||
+ i_osc_sel == TOD_OSC_0_AND_1 ||
+ i_osc_sel == TOD_OSC_0_AND_1_SEL_0 ||
+ i_osc_sel == TOD_OSC_0_AND_1_SEL_1)
+ {
+ FAPI_DBG("OSC0 is valid; master path-0 will be configured.");
- // OSC0 step alignment enabled
- l_m_path_ctrl_reg.clearBit<PERV_TOD_M_PATH_CTRL_REG_0_STEP_ALIGN_DISABLE>();
+ // OSC0 is connected
+ l_m_path_ctrl_reg.clearBit<PERV_TOD_M_PATH_CTRL_REG_0_OSC_NOT_VALID>();
- // Set 512 steps per sync for path 0
- l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_SYNC_CREATE_SPS_SELECT,
- PERV_TOD_M_PATH_CTRL_REG_SYNC_CREATE_SPS_SELECT_LEN>(
- TOD_M_PATH_CTRL_REG_M_PATH_SYNC_CREATE_SPS_512);
+ // OSC0 step alignment enabled
+ l_m_path_ctrl_reg.clearBit<PERV_TOD_M_PATH_CTRL_REG_0_STEP_ALIGN_DISABLE>();
- // Set step check CPS deviation to 50%
- l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_0_STEP_CHECK_CPS_DEVIATION,
- PERV_TOD_M_PATH_CTRL_REG_0_STEP_CHECK_CPS_DEVIATION_LEN>(
- STEP_CHECK_CPS_DEVIATION_50_00_PCENT);
+ // Set 512 steps per sync for path 0
+ l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_SYNC_CREATE_SPS_SELECT,
+ PERV_TOD_M_PATH_CTRL_REG_SYNC_CREATE_SPS_SELECT_LEN>(
+ TOD_M_PATH_CTRL_REG_M_PATH_SYNC_CREATE_SPS_512);
- // 8 valid steps are required before step check is enabled
- l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_0_STEP_CHECK_VALIDITY_COUNT,
- PERV_TOD_M_PATH_CTRL_REG_0_STEP_CHECK_VALIDITY_COUNT_LEN>(
- STEP_CHECK_VALIDITY_COUNT_8);
- }
- else
- {
- FAPI_DBG("OSC0 is not connected.");
+ // Set step check CPS deviation to 50%
+ l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_0_STEP_CHECK_CPS_DEVIATION,
+ PERV_TOD_M_PATH_CTRL_REG_0_STEP_CHECK_CPS_DEVIATION_LEN>(
+ STEP_CHECK_CPS_DEVIATION_50_00_PCENT);
- // OSC0 is not connected; any previous path-0 settings will be ignored
- l_m_path_ctrl_reg.setBit<PERV_TOD_M_PATH_CTRL_REG_0_OSC_NOT_VALID>();
- }
+ // 8 valid steps are required before step check is enabled
+ l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_0_STEP_CHECK_VALIDITY_COUNT,
+ PERV_TOD_M_PATH_CTRL_REG_0_STEP_CHECK_VALIDITY_COUNT_LEN>(
+ STEP_CHECK_VALIDITY_COUNT_8);
+ }
+ else
+ {
+ FAPI_DBG("OSC0 is not connected.");
- if (i_osc_sel == TOD_OSC_1 ||
- i_osc_sel == TOD_OSC_0_AND_1 ||
- i_osc_sel == TOD_OSC_0_AND_1_SEL_0 ||
- i_osc_sel == TOD_OSC_0_AND_1_SEL_1)
- {
- FAPI_DBG("OSC1 is valid; master path-1 will be configured.");
+ // OSC0 is not connected; any previous path-0 settings will be ignored
+ l_m_path_ctrl_reg.setBit<PERV_TOD_M_PATH_CTRL_REG_0_OSC_NOT_VALID>();
+ }
- // OSC1 is connected
- l_m_path_ctrl_reg.clearBit<PERV_TOD_M_PATH_CTRL_REG_1_OSC_NOT_VALID>();
+ if (i_osc_sel == TOD_OSC_1 ||
+ i_osc_sel == TOD_OSC_0_AND_1 ||
+ i_osc_sel == TOD_OSC_0_AND_1_SEL_0 ||
+ i_osc_sel == TOD_OSC_0_AND_1_SEL_1)
+ {
+ FAPI_DBG("OSC1 is valid; master path-1 will be configured.");
- // OSC1 step alignment enabled
- l_m_path_ctrl_reg.clearBit<PERV_TOD_M_PATH_CTRL_REG_1_STEP_ALIGN_DISABLE>();
+ // OSC1 is connected
+ l_m_path_ctrl_reg.clearBit<PERV_TOD_M_PATH_CTRL_REG_1_OSC_NOT_VALID>();
- // Set 512 steps per sync for path 1
- l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_SYNC_CREATE_SPS_SELECT,
- PERV_TOD_M_PATH_CTRL_REG_SYNC_CREATE_SPS_SELECT_LEN>(
- TOD_M_PATH_CTRL_REG_M_PATH_SYNC_CREATE_SPS_512);
+ // OSC1 step alignment enabled
+ l_m_path_ctrl_reg.clearBit<PERV_TOD_M_PATH_CTRL_REG_1_STEP_ALIGN_DISABLE>();
- // Set step check CPS deviation to 50%
- l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_1_STEP_CHECK_CPS_DEVIATION,
- PERV_TOD_M_PATH_CTRL_REG_1_STEP_CHECK_CPS_DEVIATION_LEN>(
- STEP_CHECK_CPS_DEVIATION_50_00_PCENT);
+ // Set 512 steps per sync for path 1
+ l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_SYNC_CREATE_SPS_SELECT,
+ PERV_TOD_M_PATH_CTRL_REG_SYNC_CREATE_SPS_SELECT_LEN>(
+ TOD_M_PATH_CTRL_REG_M_PATH_SYNC_CREATE_SPS_512);
- // 8 valid steps are required before step check is enabled
- l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_1_STEP_CHECK_VALIDITY_COUNT,
- PERV_TOD_M_PATH_CTRL_REG_1_STEP_CHECK_VALIDITY_COUNT_LEN>(
- STEP_CHECK_VALIDITY_COUNT_8);
- }
- else
- {
- FAPI_DBG("OSC1 is not connected.");
+ // Set step check CPS deviation to 50%
+ l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_1_STEP_CHECK_CPS_DEVIATION,
+ PERV_TOD_M_PATH_CTRL_REG_1_STEP_CHECK_CPS_DEVIATION_LEN>(
+ STEP_CHECK_CPS_DEVIATION_50_00_PCENT);
- // OSC1 is not connected; any previous path-1 settings will be ignored
- l_m_path_ctrl_reg.setBit<PERV_TOD_M_PATH_CTRL_REG_1_OSC_NOT_VALID>();
- }
+ // 8 valid steps are required before step check is enabled
+ l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_1_STEP_CHECK_VALIDITY_COUNT,
+ PERV_TOD_M_PATH_CTRL_REG_1_STEP_CHECK_VALIDITY_COUNT_LEN>(
+ STEP_CHECK_VALIDITY_COUNT_8);
+ }
+ else
+ {
+ FAPI_DBG("OSC1 is not connected.");
- // CPS deviation factor configures both path-0 and path-1
- l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_STEP_CHECK_CPS_DEVIATION_FACTOR,
- PERV_TOD_M_PATH_CTRL_REG_STEP_CHECK_CPS_DEVIATION_FACTOR_LEN>(
- STEP_CHECK_CPS_DEVIATION_FACTOR_1);
+ // OSC1 is not connected; any previous path-1 settings will be ignored
+ l_m_path_ctrl_reg.setBit<PERV_TOD_M_PATH_CTRL_REG_1_OSC_NOT_VALID>();
+ }
+
+ // CPS deviation factor configures both path-0 and path-1
+ l_m_path_ctrl_reg.insertFromRight<PERV_TOD_M_PATH_CTRL_REG_STEP_CHECK_CPS_DEVIATION_FACTOR,
+ PERV_TOD_M_PATH_CTRL_REG_STEP_CHECK_CPS_DEVIATION_FACTOR_LEN>(
+ STEP_CHECK_CPS_DEVIATION_FACTOR_1);
+ }
FAPI_TRY(fapi2::putScom(*(i_tod_node->i_target),
PERV_TOD_M_PATH_CTRL_REG,
@@ -1071,13 +1077,10 @@ fapi2::ReturnCode configure_tod_node(
i_osc_sel),
"Error from configure_port_ctrl_regs!");
- if (is_mdmt)
- {
- FAPI_TRY(configure_m_path_ctrl_reg(i_tod_node,
- i_tod_sel,
- i_osc_sel),
- "Error from configure_m_path_ctrl_reg!");
- }
+ FAPI_TRY(configure_m_path_ctrl_reg(i_tod_node,
+ i_tod_sel,
+ i_osc_sel),
+ "Error from configure_m_path_ctrl_reg!");
FAPI_TRY(configure_i_path_ctrl_reg(i_tod_node,
i_tod_sel,
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