PM: Generated Vratio/Vindex tables

    Key_Cronus_Test=PM_REGRESS

Change-Id: I9313dbe90771a549e14c8e90f2c2ca410616293a
CQ: SW421682
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55059
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55069
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 63 insertions, 10 deletions

diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
index 3e501d7bc..3f8388a92 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcode_image_defines.H
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -631,8 +631,7 @@ typedef struct
     uint8_t  ppmr_reserved0[PGPE_IMAGE_RESERVE_SIZE];
     uint8_t  occParmBlock[sizeof(OCCPstateParmBlock)];  // PPMR + 128KB
     uint8_t  occParmBlockReserve[OCC_PSTATE_PARAM_BLOCK_REGION_SIZE - sizeof(OCCPstateParmBlock)];
-    uint8_t  pstateTable[sizeof(GeneratedPstateInfo)];  // PPMR + 144KB
-    uint8_t  pstateTableReserve[PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE - sizeof(GeneratedPstateInfo)];
+    uint8_t  pstateTable[PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE];  // PPMR + 144KB
     uint8_t  ppmr_reserved1[WOF_TABLE_RESERVE];
     uint8_t  wofTableSize[OCC_WOF_TABLES_SIZE]; //WOF Tables located ar PPMR base + 768KB
 } PPMRLayout_t;
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_table.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_table.h
index 1c0bb4b5f..0f336bcee 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_table.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_table.h
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2015,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -46,9 +46,11 @@
 /// on the fly during Pstate protocol execution based on the Pstate Parameter
 /// Block content.
 
-#define MAX_PSTATE_TABLE_ENTRIES  128
-#define GEN_PSTATES_TBL_MAGIC    0x50535441424c3030ULL //PSTABL00 (last two ASCII characters indicate version number)
-#define GEN_PSTATES_TBL_MAGIC_V1    0x50535441424c3031ULL //PSTABL01 (last two ASCII characters indicate version number)
+#define MAX_PSTATE_TABLE_ENTRIES        128
+#define MAX_VRATIO_VINDEX_TABLE_ENTRIES 299
+#define GEN_PSTATES_TBL_MAGIC           0x50535441424c3030ULL //PSTABL00 (last two ASCII characters indicate version number)
+#define GEN_PSTATES_TBL_MAGIC_V1        0x50535441424c3031ULL //PSTABL01 (last two ASCII characters indicate version number)
+#define GEN_PSTATES_TBL_MAGIC_V2        0x50535441424c3032ULL //PSTABL02 (last two ASCII characters indicate version number)
 
 #ifndef __ASSEMBLER__
 #ifdef __cplusplus
@@ -100,6 +102,11 @@ typedef struct
 
 } PstateTable;
 
+typedef struct
+{
+    uint16_t vratio;
+    uint16_t vindex;
+} VRatioVIndexTable;
 
 /// GeneratedPstateInfo - VERSION0
 typedef struct
@@ -124,6 +131,7 @@ typedef struct
     /// Note: if all bias attributes are 0, this content will be the same
     /// as the raw_pstates content.
     PstateTable biased_pstates[MAX_PSTATE_TABLE_ENTRIES];
+
 } GeneratedPstateInfo;
 
 
@@ -167,6 +175,52 @@ typedef struct
     PstateTable biased_pstates[MAX_PSTATE_TABLE_ENTRIES];
 } GeneratedPstateInfo_v1;
 
+/// GeneratedPstateInfo - VERSION2
+typedef struct
+{
+    uint32_t    gppb_offset;
+    uint32_t    gppb_length;
+    uint32_t    ps0_offset;
+    uint32_t    highest_ps_offset;
+    uint32_t    raw_pstate_tbl_offset;
+    uint32_t    raw_pstate_tbl_length;
+    uint32_t    biased_pstate_tbl_offset;
+    uint32_t    biased_pstate_tbl_length;
+    uint32_t    vratio_vindex_tbl_offset;
+    uint32_t    vratio_vindex_tbl_length;
+} GeneratedPstateInfoHeader_v2;
+
+typedef struct
+{
+
+    /// Magic Number
+    uint64_t magic;   // ASCII: "PSTABL02 "
+
+    /// Offset and lengths for fields of this structure
+    GeneratedPstateInfoHeader_v2 header;
+
+    // PGPE content
+    GlobalPstateParmBlock globalppb;
+
+    /// The fastest frequency - after biases have been applied
+    uint32_t pstate0_frequency_khz;
+
+    /// Highest Pstate Number => slowest Pstate generated
+    uint32_t highest_pstate;
+
+    /// Generated table with system paramters included but without biases
+    PstateTable raw_pstates[MAX_PSTATE_TABLE_ENTRIES];
+
+    /// Generated table with system paramters and biases
+    /// Note: if all bias attributes are 0, this content will be the same
+    /// as the raw_pstates content.
+    PstateTable biased_pstates[MAX_PSTATE_TABLE_ENTRIES];
+
+    ///Generate table with vratio and vindex for all
+    ///combinations of activeCores and sortCores
+    VRatioVIndexTable vratio_vindex[MAX_VRATIO_VINDEX_TABLE_ENTRIES];
+} GeneratedPstateInfo_v2;
+
 
 #ifdef __cplusplus
 } // end extern C
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index 4641d7d21..2132d7878 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -2418,9 +2418,9 @@ fapi2::ReturnCode buildParameterBlock( void* const i_pHomer, CONST_FAPI2_PROC& i
         //------------------------------ OCC P-State Table Allocation ------------------------------
 
         //  The PPMR offset is from the begining --- which is the ppmrHeader
-        io_ppmrHdr.g_ppmr_pstables_offset    =   pPpmr->pstateTable - pPpmr->ppmrHeader;;
-        io_ppmrHdr.g_ppmr_pstables_length    =   sizeof(GeneratedPstateInfo);
-        FAPI_INF( "PPMR GEN PSTABLE 0x%08x", sizeof(GeneratedPstateInfo) );
+        io_ppmrHdr.g_ppmr_pstables_offset    =   pPpmr->pstateTable - pPpmr->ppmrHeader;
+        io_ppmrHdr.g_ppmr_pstables_length    =   PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE;
+        FAPI_INF( "PPMR GEN PSTABLE %u(KB)",PGPE_PSTATE_OUTPUT_TABLES_REGION_SIZE);
 
         //------------------------------ Copying WOF Table ----------------------------------------------