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| author | Jennifer A. Stofer <stofer@us.ibm.com> | 2017-12-08 10:41:23 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-03-13 10:22:27 -0400 |
| commit | 7728cc84c782ccdcfb6e3962fe9f38d65b31d8cb (patch) | |
| tree | cf00d5e6e53967a68d6dbd8d0906f8e3bb027afd /src/import/chips/p9/procedures | |
| parent | 0844be4f3967d9be297326c35285a306ecba6640 (diff) | |
| download | talos-hostboot-7728cc84c782ccdcfb6e3962fe9f38d65b31d8cb.tar.gz talos-hostboot-7728cc84c782ccdcfb6e3962fe9f38d65b31d8cb.zip | |
Revert "Adding p9a support."
This reverts commit 41352b2d444e98639eedc06b1eb0d8da89d4adb3.
Change-Id: I9d90ccb7eb84f65000e57851dadab900ce0c3b37
Original-Change-Id: Ic3f2099eff3f5c942ef8fb6916e8ee78ca1a9e82
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50703
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55604
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 164 |
1 files changed, 17 insertions, 147 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 3375028e3..e865584fe 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -32,153 +32,6 @@ <!-- ********************************************************************* --> <attribute> - <id>ATTR_CHIP_EC_FEATURE_SEPARATE_CORE_DBG_CNTL</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - The chip had a consolodated npu_top. - True for Nimbus and Cumulus, not Axone - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_AXONE</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_CHIP_EC_FEATURE_ONE_NPU_TOP</id> - <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> - <description> - The chip had a consolodated npu_top. - True for Nimbus and Cumulus, not Axone - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - <chip> - <name>ENUM_ATTR_NAME_CUMULUS</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_CHIP_EC_FEATURE_ALINK</id> - <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> - <description> - Returns true if the chip has an A-Link - (Nimbus and Cumulus, not Axone) - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - <chip> - <name>ENUM_ATTR_NAME_CUMULUS</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - <!-- ******************************************************************** --> - <attribute> - <id>ATTR_CHIP_EC_FEATURE_NOT_DD1_FBC_AND_ALINK</id> - <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> - <description> - DD1 FBC setting differs from DD2, ex. lo_limit adjustment. - Axone does not have A-link support - True if Nimbus dd2 or greater or cumulus - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x20</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - <chip> - <name>ENUM_ATTR_NAME_CUMULUS</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_CHIP_EC_FEATURE_NO_NPU2_FIR</id> - <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> - <description> - Nimbus DD1 only: NPU2 FIR not present - Axone, does not have a single npu_top. Instead - it has npu_top0..2 - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x20</value> - <test>LESS_THAN</test> - </ec> - </chip> - <chip> - <name>ENUM_ATTR_NAME_AXONE</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - <!-- ********************************************************************* --> - <attribute> - <id>ATTR_CHIP_EC_FEATURE_CORE_LOCAL_TRACE2</id> - <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> - <description> - Does the core has TRACE2 with LOCAL dial names - (Nimbus dd2.X and Cumulus, Not Axone) - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x20</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - <chip> - <name>ENUM_ATTR_NAME_CUMULUS</name> - <ec> - <value>0x10</value> - <test>GREATER_THAN_OR_EQUAL</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - - <!-- ********************************************************************* --> - <attribute> <id>ATTR_CHIP_EC_FEATURE_HW416934_HW419818</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -5470,6 +5323,23 @@ </chipEcFeature> </attribute> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_NO_NPU2_FIR</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1 only: NPU2 FIR not present + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> <attribute> <id>ATTR_CHIP_EC_FEATURE_HW399466</id> |
