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author | Ben Gass <bgass@us.ibm.com> | 2017-12-08 15:48:31 -0600 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-03-13 10:26:33 -0400 |
commit | 5b9b993f082c72aa752a48f43df86ff808239c79 (patch) | |
tree | 8e5caa668c9cb423947ab775f139a8649112ebee /src/import/chips/p9/procedures | |
parent | 3a66a14710fe2a0b4b114b7b5dae3d364a9c1652 (diff) | |
download | talos-hostboot-5b9b993f082c72aa752a48f43df86ff808239c79.tar.gz talos-hostboot-5b9b993f082c72aa752a48f43df86ff808239c79.zip |
Re-submit Axone updates
The original patch: https://ralgit01.raleigh.ibm.com/gerrit1/#/c/45266/
was merged prematurely.
It was reverted in: https://ralgit01.raleigh.ibm.com/gerrit1/#/c/50703/
pre-commit-actions updated to call code-beautifier twice. Some generated
code for initfiles changes between first and second passes.
Change-Id: I5e36105a5cb91f57935e5600679aaa2f61afed4e
Original-Change-Id: I25bdc2ceaf9636a2f6559775bc8cb9616848c9d7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50741
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Richard J. Knight <rjknight@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55623
CI-Ready: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml | 251 |
1 files changed, 234 insertions, 17 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml index 52cc030d3..205dfa630 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/chip_ec_attributes.xml @@ -32,6 +32,153 @@ <!-- ********************************************************************* --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_SEPARATE_CORE_DBG_CNTL</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Support for the CDIAL LS_DBG_CTRL was dropped, so individual + debug dials need to be used. See George Rohrbaugh. + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_ONE_NPU_TOP</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + The chip had a consolodated npu_top. + True for Nimbus and Cumulus, not Axone + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_ALINK</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + Returns true if the chip has an A-Link + (Nimbus and Cumulus, not Axone) + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ******************************************************************** --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_NOT_DD1_FBC_AND_ALINK</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + DD1 FBC setting differs from DD2, ex. lo_limit adjustment. + Axone does not have A-link support + True if Nimbus dd2 or greater or cumulus + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_NO_NPU2_FIR</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + Nimbus DD1 only: NPU2 FIR not present + Axone, does not have a single npu_top. Instead + it has npu_top0..2 + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>LESS_THAN</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_CHIP_EC_FEATURE_CORE_LOCAL_TRACE2</id> + <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> + <description> + Does the core has TRACE2 with LOCAL dial names + (Nimbus dd2.X and Cumulus, Not Axone) + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_NIMBUS</name> + <ec> + <value>0x20</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + + <!-- ********************************************************************* --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_HW416934_HW419818</id> <targetType>TARGET_TYPE_PROC_CHIP, TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -583,6 +730,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> @@ -607,6 +761,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> @@ -2442,6 +2603,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> @@ -2777,6 +2945,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> @@ -3598,6 +3773,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> @@ -5853,23 +6035,6 @@ </chipEcFeature> </attribute> - <attribute> - <id>ATTR_CHIP_EC_FEATURE_NO_NPU2_FIR</id> - <targetType>TARGET_TYPE_PROC_CHIP</targetType> - <description> - Nimbus DD1 only: NPU2 FIR not present - </description> - <chipEcFeature> - <chip> - <name>ENUM_ATTR_NAME_NIMBUS</name> - <ec> - <value>0x20</value> - <test>LESS_THAN</test> - </ec> - </chip> - </chipEcFeature> - </attribute> - <!-- ******************************************************************** --> <attribute> <id>ATTR_CHIP_EC_FEATURE_HW399466</id> @@ -6183,6 +6348,30 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_CHIP_EC_FEATURE_IOO1_IOO2_PLL_INITF</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Cumulus and Axone only: IOO1 and IOO2 PLL initf + </description> + <chipEcFeature> + <chip> + <name>ENUM_ATTR_NAME_CUMULUS</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> + </chipEcFeature> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_CHIP_EC_FEATURE_EXTRACT_SBE_RC_P9NDD1_CHIPS</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -6308,6 +6497,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> @@ -6425,6 +6621,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> @@ -6450,6 +6653,13 @@ <test>GREATER_THAN_OR_EQUAL</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> @@ -6534,6 +6744,13 @@ <test>LESS_THAN</test> </ec> </chip> + <chip> + <name>ENUM_ATTR_NAME_AXONE</name> + <ec> + <value>0x10</value> + <test>GREATER_THAN_OR_EQUAL</test> + </ec> + </chip> </chipEcFeature> </attribute> <!-- ******************************************************************** --> |