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author | Stephen Glancy <sglancy@us.ibm.com> | 2018-11-28 14:52:11 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-01-16 08:32:31 -0600 |
commit | 3e681b92f8a4a6dc99276f222899a7d08dfff68c (patch) | |
tree | 8dc3c08f2eef3b80a3e535aff1b9a13f691a3329 /src/import/chips/p9/procedures | |
parent | b0ab4fd697a7a37d12fb6440568886889c8ecbf2 (diff) | |
download | talos-hostboot-3e681b92f8a4a6dc99276f222899a7d08dfff68c.tar.gz talos-hostboot-3e681b92f8a4a6dc99276f222899a7d08dfff68c.zip |
Fixes LRDIMM initialization attributes and timings
Change-Id: I09246082fe3619fa5f2c6e439b846e0afa647e2e
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69201
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69211
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures')
3 files changed, 35 insertions, 13 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C index 353973562..78a9a7676 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2018 */ +/* Contributors Listed Below - COPYRIGHT 2015,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -45,6 +45,7 @@ #include <lib/dimm/ddr4/data_buffer_ddr4.H> #include <lib/mss_attribute_accessors.H> #include <lib/workarounds/ccs_workarounds.H> +#include <generic/memory/lib/spd/spd_utils.H> using fapi2::TARGET_TYPE_MCBIST; using fapi2::TARGET_TYPE_MCA; @@ -122,8 +123,8 @@ fapi2::ReturnCode bcw_load_ddr4( const fapi2::Target<TARGET_TYPE_DIMM>& i_target // Function space 5 { FUNC_SPACE_5, FUNC_SPACE_SELECT_CW, FUNC_SPACE_5, mss::tmrd(), CW8_DATA_LEN, cw_info::BCW}, - { FUNC_SPACE_5, HOST_VREF_CW, eff_dimm_ddr4_f5bc5x, mss::tmrc(), CW8_DATA_LEN, cw_info::BCW}, - { FUNC_SPACE_5, DRAM_VREF_CW, eff_dimm_ddr4_f5bc6x, mss::tmrc(), CW8_DATA_LEN, cw_info::BCW}, + { FUNC_SPACE_5, HOST_VREF_CW, eff_dimm_ddr4_f5bc5x, mss::lrdimm::vref_time_long(i_target), CW8_DATA_LEN, cw_info::BCW}, + { FUNC_SPACE_5, DRAM_VREF_CW, eff_dimm_ddr4_f5bc6x, mss::lrdimm::vref_time_long(i_target), CW8_DATA_LEN, cw_info::BCW}, // Function space 6 { FUNC_SPACE_6, FUNC_SPACE_SELECT_CW, FUNC_SPACE_6, mss::tmrd(), CW8_DATA_LEN, cw_info::BCW}, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index b5e562a39..4181e791e 100755 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -5315,13 +5315,16 @@ fapi_try_exit: /// fapi2::ReturnCode eff_lrdimm::dimm_f0bc1x() { + // Enables package rank timing + // The LR buffers will have the same timing communicating to the host + constexpr uint8_t DEFAULT = 0x80; uint8_t l_attrs_dimm_bc_1x[PORTS_PER_MCS][MAX_DIMM_PER_PORT] = {}; // Retrieve MCS attribute data FAPI_TRY( eff_dimm_ddr4_f0bc1x(iv_mcs, &l_attrs_dimm_bc_1x[0][0]) ); // Setup to default as we want to be in runtime mode - l_attrs_dimm_bc_1x[iv_port_index][iv_dimm_index] = 0; + l_attrs_dimm_bc_1x[iv_port_index][iv_dimm_index] = DEFAULT; FAPI_INF( "%s: F0BC1X setting: 0x%02x", mss::c_str(iv_dimm), l_attrs_dimm_bc_1x[iv_port_index][iv_dimm_index] ); FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DIMM_DDR4_F0BC1x, iv_mcs, l_attrs_dimm_bc_1x) ); @@ -5917,22 +5920,20 @@ fapi2::ReturnCode eff_lrdimm::odt_wr() 0x00, 0x00, }; + uint8_t l_mcs_attr[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM] = {}; - uint8_t l_vpd_odt[MAX_RANK_PER_DIMM]; // Gets the VPD value - FAPI_TRY( mss::vpd_mt_odt_wr(iv_dimm, &(l_vpd_odt[0]))); FAPI_TRY( eff_odt_wr( iv_mcs, &(l_mcs_attr[0][0][0])) ); // Loops through and sets/updates all ranks for(uint64_t l_rank = 0; l_rank < MAX_RANK_PER_DIMM; ++l_rank) { // TODO:RTC200577 Update LRDIMM termination settings for dual drop and 4 rank DIMM's - // So, here we do a bitwise or of our LR settings and our VPD settings - // The VPD contains the host <-> buffer settings - // The constant contains the buffer <-> DRAM - // Due to how the ODT functions, we need to or them - l_mcs_attr[iv_port_index][iv_dimm_index][l_rank] = l_vpd_odt[l_rank] | ODT_2R_1DROP_VALUES[l_rank]; + // Currently, we're using a 2R single drop system + // To avoid terminating our 0th rank twice, we just want to pass in the termination directly + // This will be sorted out as part of the above RTC + l_mcs_attr[iv_port_index][iv_dimm_index][l_rank] = ODT_2R_1DROP_VALUES[l_rank]; } FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_EFF_ODT_WR, iv_mcs, l_mcs_attr) ); diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H index d1b2ed8b0..089e275d9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2018 */ +/* Contributors Listed Below - COPYRIGHT 2016,2019 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -1189,5 +1189,25 @@ constexpr uint64_t tccd_s() return 4; } +namespace lrdimm +{ + +/// +/// @brief Return the VREF to VREF change time long +/// @tparam fapi2::TargetType T - type of the target on which to operate +/// @param[in] i_target the fapi2 target +/// @return value in clocks +/// @note VREF time change long is used for changing by more than one VREF tick +/// +template< fapi2::TargetType T > +inline uint64_t vref_time_long(const fapi2::Target<T>& i_target) +{ + // Taken from the LRDIMM spec + constexpr uint64_t VREF_TIME_LONG_NS = 500; + return mss::spd::ns_to_nck(i_target, VREF_TIME_LONG_NS); +} + +} // ns lrdimm + } // mss #endif |