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| author | Dan Crowell <dcrowell@us.ibm.com> | 2019-06-25 12:21:48 -0500 |
|---|---|---|
| committer | Christian R Geddes <crgeddes@us.ibm.com> | 2019-08-08 10:16:12 -0500 |
| commit | fae196d6660d1822446582ecee27726013ef3a1a (patch) | |
| tree | 319b99de7d31d858c91c371bb99ec9518c52c7cc /src/import/chips/p9/procedures/xml | |
| parent | 9bdc8a41dd5bcb8c921b14f59c9edd071746d820 (diff) | |
| download | talos-hostboot-fae196d6660d1822446582ecee27726013ef3a1a.tar.gz talos-hostboot-fae196d6660d1822446582ecee27726013ef3a1a.zip | |
Add Axone comment to grouping attribute
Pointing out the use of MCC for grouping attribute
Change-Id: I5dbd03d18ca4e9d0d6b638d8458c365809f5e68f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79460
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Benjamin Gass <bgass@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79500
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml')
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml index e9796443b..4a6639578 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/nest_attributes.xml @@ -1106,11 +1106,11 @@ An 8 bit vector that would be a designation of which MC (Nimbus MCA or Cumulus MI) are involved in the group. So the bits would represent - Nimbus Cumulus - Bit 0 MCA0 MI0 - Bit 1 MCA1 MI1 + Nimbus Cumulus Axone + Bit 0 MCA0 MI0 MCC0 + Bit 1 MCA1 MI1 MCC1 ..... - Bit 7 MCA7 MI7 + Bit 7 MCA7 MI7 MCC7 Set by p9_mss_eff_grouping </description> <valueType>uint8</valueType> |
