summaryrefslogtreecommitdiffstats
path: root/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
diff options
context:
space:
mode:
authorJacob Harvey <jlharvey@us.ibm.com>2016-08-31 13:55:41 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2016-11-01 11:04:23 -0400
commit6c22f61fc163823ec0ef677c2fce851fe704c466 (patch)
treeec1a6faec8729704de2998b4c5f6c86cf5166b29 /src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
parente6bca1c97afaea818b8f41a3e39d0eb25910219d (diff)
downloadtalos-hostboot-6c22f61fc163823ec0ef677c2fce851fe704c466.tar.gz
talos-hostboot-6c22f61fc163823ec0ef677c2fce851fe704c466.zip
Implement L2 eff_config_thermal, bulk_pwr_throttle
Implemented p9_mss_bulk_pwr_throttles p9_mss_utils_to_throttles p9_mss_eff_config_thermal Updated throttle xml Change-Id: I0492f9fe8a5bd027ff5875f236711bcf55af88f5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31804 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Brian R. Silver <bsilver@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31813 Reviewed-by: Hostboot Team <hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml')
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
index f4737af85..8c59ba71f 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
@@ -102,6 +102,7 @@
<platInit/>
<initToZero/>
<array>100</array>
+ <default>0xffffe00002CC03AE</default>
<mssAccessorName>mrw_pwr_intercept</mssAccessorName>
</attribute>
@@ -132,6 +133,7 @@
<platInit/>
<initToZero/>
<array>100</array>
+ <default>0xffffe00003FD0546</default>
<mssAccessorName>mrw_pwr_slope</mssAccessorName>
</attribute>
@@ -246,7 +248,7 @@
<id>ATTR_MSS_MRW_POWER_CONTROL_REQUESTED</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
- Memory power control settings programmed during IPL
+ Memory power control settings programmed during IPL
Used by OCC when exiting idle power-save mode
</description>
<valueType>uint8</valueType>
OpenPOWER on IntegriCloud