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authorJenny Huynh <jhuynh@us.ibm.com>2018-04-17 09:48:50 -0500
committerChristian R. Geddes <crgeddes@us.ibm.com>2019-02-28 09:41:03 -0600
commitcbea08dbf1b3609db30637d554f5cb47897f034f (patch)
tree58797834c6163ced65623b55de2759d21a55954b /src/import/chips/p9/procedures/hwp
parente8cfacbc323272fa731339fae62c7e5bbc69388d (diff)
downloadtalos-hostboot-cbea08dbf1b3609db30637d554f5cb47897f034f.tar.gz
talos-hostboot-cbea08dbf1b3609db30637d554f5cb47897f034f.zip
Secure memory allocation and setup
p9_mss_eff_grouping.C: - determines whether secure mem is requested, reserves smf space - always reserve smf at end of range because of end-of-range bit - set addr15 when reporting smf base address - mask off group_id(0) via chip address extension if smf is enabled - updated to set value of attr_smf_enabled - enhanced error reporting with smf config/supported values - made values reported to attr_mss_mcs_group_32 more clear p9_mss_setup_bars.C: - set MCFGPA/MCFGPMA registers with SMF data - fixed scom registers for MCFGPA/MCFGPMA hole setup - added note to leave MCFIR_invalid_smf masked for HW451708/HW451711 - added assert to check for HOLE1 and SMF enable overlaps p9_query_mssinfo.C: - updated to print out SMF reservations - print out HTM/OCC/SMF reservations regardless of mirroring enable p9_fbc_utils.C: - prevent group_id(0)=1 from affecting mappable memory ranges p9_sbe_fabricinit.C: - mask off group_id(0) via chip address extension if smf is enabled p9_setup_sbe_config.C, p9_sbe_attr_setup.C: - use scratch_reg6 bit(16) to pass smf_config value initfiles: - removed setup to use other addr bits as secure bit; core only uses addr15 - added setup for ncu addr15 value in hcode - always set addr15 config bit in bridge unit if smf is supported - set addr15 bit across all mcs if smf is enabled - added in settings to enable smf in nmmu unit - hardcode group_id(0) bit in chipext mask for bridge unit if smf is supported attributes: - ATTR_SMF_ENABLE is a system level attribute - changed SMF_ENABLE->SMF_CONFIG; smf_enabled will be (config && supported) CQ:HW451708 CQ:HW451711 Change-Id: I0c35a362d68dab43758e7dfbd78fff702238ef2f Original-Change-Id: I6cf85600354baa322e959c922f596ecc5c68a458 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/57322 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Dev-Ready: Brent Wieman <bwieman@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72548 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
-rw-r--r--src/import/chips/p9/procedures/hwp/nest/p9_query_mssinfo.C45
1 files changed, 42 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_query_mssinfo.C b/src/import/chips/p9/procedures/hwp/nest/p9_query_mssinfo.C
index 93133f5e8..ea80302fc 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_query_mssinfo.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_query_mssinfo.C
@@ -71,6 +71,8 @@ fapi2::ReturnCode p9_query_mssinfo(const std::vector<fapi2::Target<fapi2::TARGET
uint64_t nhtm_size;
uint64_t chtm_bases[24];
uint64_t chtm_sizes[24];
+ uint64_t smf_base;
+ uint64_t smf_size;
uint64_t occ_base;
uint64_t occ_size;
uint8_t mirror_policy;
@@ -302,9 +304,8 @@ fapi2::ReturnCode p9_query_mssinfo(const std::vector<fapi2::Target<fapi2::TARGET
//------------------------------------------------------------------------------------------------------------------------
// Print out memory reservations
//------------------------------------------------------------------------------------------------------------------------
- if(((mirror_policy == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL ) ||
- (mirror_policy == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_FLIPPED) )
- && (l_mirrorEnabled != fapi2::ENUM_ATTR_MRW_HW_MIRRORING_ENABLE_FALSE) )
+ if((mirror_policy == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_NORMAL ) ||
+ (mirror_policy == fapi2::ENUM_ATTR_MEM_MIRROR_PLACEMENT_POLICY_FLIPPED))
{
// ATTR_PROC_NHTM_BAR_BASE_ADDR: Get Nest Hardware Trace Macro (NHTM) bar base addr
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_NHTM_BAR_BASE_ADDR, i_vect_pu_targets[i], nhtm_base),
@@ -326,6 +327,16 @@ fapi2::ReturnCode p9_query_mssinfo(const std::vector<fapi2::Target<fapi2::TARGET
"Error reading ATTR_PROC_CHTM_BAR_SIZES, l_rc 0x%.8X",
(uint64_t)fapi2::current_err);
+ // ATTR_PROC_SMF_BAR_BASE_ADDR: Get Secure Memory Facility (SMF) bar base addr
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_SMF_BAR_BASE_ADDR, i_vect_pu_targets[i], smf_base),
+ "Error reading ATTR_PROC_SMF_BAR_BASE_ADDR, l_rc 0x%.8X",
+ (uint64_t)fapi2::current_err);
+
+ // ATTR_PROC_SMF_BAR_SIZE: Get Secure Memory Facility (SMF) bar size
+ FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_SMF_BAR_SIZE, i_vect_pu_targets[i], smf_size),
+ "Error reading ATTR_PROC_SMF_BAR_SIZE, l_rc 0x%.8X",
+ (uint64_t)fapi2::current_err);
+
// ATTR_PROC_OCC_SANDBOX_BASE_ADDR
FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PROC_OCC_SANDBOX_BASE_ADDR, i_vect_pu_targets[i], occ_base),
"Error reading ATTR_PROC_OCC_SANDBOX_BASE_ADDR, l_rc 0x%.8X",
@@ -345,6 +356,7 @@ fapi2::ReturnCode p9_query_mssinfo(const std::vector<fapi2::Target<fapi2::TARGET
if ((nhtm_size != 0) ||
(chtm_total_size != 0) ||
+ (smf_size != 0) ||
(occ_size != 0))
{
printf("\n");
@@ -434,6 +446,33 @@ fapi2::ReturnCode p9_query_mssinfo(const std::vector<fapi2::Target<fapi2::TARGET
}
}
+ if (smf_size != 0)
+ {
+ std::string suffix = "B";
+
+ if (smf_size >= (1024 * 1024 * 1024))
+ {
+ suffix = "GB";
+ smf_size /= (1024 * 1024 * 1024);
+ }
+ else if (smf_size >= (1024 * 1024))
+ {
+ suffix = "MB";
+ smf_size /= (1024 * 1024);
+ }
+ else if (smf_size >= (1024))
+ {
+ suffix = "KB";
+ smf_size /= (1024);
+ }
+
+#ifdef _LP64
+ printf("SMF Base Address = 0x%016lx Size = %ld (%s)\n", smf_base, smf_size, suffix.c_str());
+#else
+ printf("SMF Base Address = 0x%016llx Size = %lld (%s)\n", smf_base, smf_size, suffix.c_str());
+#endif
+ }
+
}
//------------------------------------------------------------------------------------------------------------------------
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