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| author | Stephen Glancy <sglancy@us.ibm.com> | 2018-08-17 14:42:26 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2018-09-18 10:43:41 -0500 |
| commit | 444aeb467542541afb6aa8072037c8ddc74ab10c (patch) | |
| tree | 1c4ca88630d0c69709cb16c4da3fd98d1d69f610 /src/import/chips/p9/procedures/hwp | |
| parent | 4f35730b3dbecc04c63c2cd6a269eba2bc19fe33 (diff) | |
| download | talos-hostboot-444aeb467542541afb6aa8072037c8ddc74ab10c.tar.gz talos-hostboot-444aeb467542541afb6aa8072037c8ddc74ab10c.zip | |
Adds skeleton code for LRDIMM
Change-Id: I3f55896a48347fff7152c3a2a68cf8fab4fa0689
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64813
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/64967
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp')
16 files changed, 474 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C index d1e8edc48..cf7cd850e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.C @@ -55,6 +55,8 @@ using fapi2::FAPI2_RC_SUCCESS; namespace mss { +// TK:LRDIMM Update and/or verify bcw load + /// /// @brief Perform the bcw_load_ddr4 operations /// @param[in] i_target a DIMM target diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H index 1ff2d9e10..7e68d32d0 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/bcw_load_ddr4.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -43,6 +43,7 @@ namespace mss { +// TK:LRDIMM Update and/or bcw load /// /// @brief Perform the bcw_load_ddr4 operations /// @param[in] i_target a DIMM target diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H index 1d4dadea1..638122ea6 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/ddr4/data_buffer_ddr4.H @@ -47,6 +47,12 @@ namespace mss { +// TK:LRDIMM Verify this functionality and data (looked good to me, but more eyes are better - SPG) +// TK:LRDIMM Create automatic function space selector code +// The idea behind this is +// 1) function space 0 is the default +// 2) we want to be able to say "here's a bunch of buffer control words, hit the appropriate function space before each is needed) +// Will greatly simplify code enum nibble : size_t { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index 8446c6838..c6ac6db5a 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -4513,6 +4513,7 @@ fapi_try_exit: return fapi2::current_err; } +// TK:LRDIMM Update and/or verify all bc## steps below /// /// @brief Determines & sets effective config for DIMM BC00 /// @return fapi2::FAPI2_RC_SUCCESS if okay diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C index f2edb7873..4540b3d65 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -43,7 +43,7 @@ using fapi2::FAPI2_RC_INVALID_PARAMETER; namespace mss { - +// TK:LRDIMM Update the rank code + pairings to take into account LRDIMM (1 primary rank per LR + secondary to quaternary per LR) aka 4 rank DIMM's // Definition of the Nimbus PHY rank_pair0 config registers const std::vector< uint64_t > rankPairTraits<TARGET_TYPE_MCA, 0>::RANK_PAIR_REGS = { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H index 62fc63bdf..30fbbb09f 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.H @@ -48,6 +48,7 @@ namespace mss { +// TK:LRDIMM Update the rank code + pairings to take into account LRDIMM (1 primary rank per LR + secondary to quaternary per LR) aka 4 rank DIMM's enum { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C index a5bc2d719..a5f019823 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C @@ -69,6 +69,7 @@ fapi2::ReturnCode check_lrdimm( const std::vector<dimm::kind>& i_kinds ) fapi2::current_err = fapi2::FAPI2_RC_SUCCESS; // If we have 0 DIMMs on the port, we don't care + // TK:LRDIMM Create appropriate check for LRDIMM(s) here for(const auto& l_kind : i_kinds) { FAPI_ASSERT( l_kind.iv_dimm_type != fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C new file mode 100644 index 000000000..fb0213987 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C @@ -0,0 +1,207 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.C $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2018 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file lib/phy/mss_lrdimm_training.C +/// @brief LRDIMM training implementation +/// Training is very device specific, so there is no attempt to generalize +/// this code in any way. +/// +// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com> +// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#include <lib/phy/mss_lrdimm_training.H> + +namespace mss +{ + +namespace training +{ + +namespace lrdimm +{ + +/// +/// @brief Sets up and runs the calibration step +/// @param[in] i_target - the MCA target on which to operate +/// @param[in] i_rp - the rank pair +/// @param[in] i_abort_on_error - whether or not we are aborting on cal error +/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode mrep::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const +{ + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Executes a cal step with workarounds +/// @param[in] i_target - the MCA target on which to operate +/// @param[in] i_rp - the rank pair +/// @param[in] i_abort_on_error - whether or not we are aborting on cal error +/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode mrep::execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const +{ + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Calculates the number of cycles a given calibration step will take +/// @param[in] i_target - the MCA target on which to operate +/// @return l_cycles - the number of cycles a given calibration step wil take +/// +uint64_t mrep::calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const +{ + return 0; +} + +/// +/// @brief Sets up and runs the calibration step +/// @param[in] i_target - the MCA target on which to operate +/// @param[in] i_rp - the rank pair +/// @param[in] i_abort_on_error - whether or not we are aborting on cal error +/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode dwl::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const +{ + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Executes a cal step with workarounds +/// @param[in] i_target - the MCA target on which to operate +/// @param[in] i_rp - the rank pair +/// @param[in] i_abort_on_error - whether or not we are aborting on cal error +/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode dwl::execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const +{ + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Calculates the number of cycles a given calibration step will take +/// @param[in] i_target - the MCA target on which to operate +/// @return l_cycles - the number of cycles a given calibration step wil take +/// +uint64_t dwl::calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const +{ + return 0; +} + +/// +/// @brief Sets up and runs the calibration step +/// @param[in] i_target - the MCA target on which to operate +/// @param[in] i_rp - the rank pair +/// @param[in] i_abort_on_error - whether or not we are aborting on cal error +/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode mrd::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const +{ + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Executes a cal step with workarounds +/// @param[in] i_target - the MCA target on which to operate +/// @param[in] i_rp - the rank pair +/// @param[in] i_abort_on_error - whether or not we are aborting on cal error +/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode mrd::execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const +{ + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Calculates the number of cycles a given calibration step will take +/// @param[in] i_target - the MCA target on which to operate +/// @return l_cycles - the number of cycles a given calibration step wil take +/// +uint64_t mrd::calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const +{ + return 0; +} + +/// +/// @brief Sets up and runs the calibration step +/// @param[in] i_target - the MCA target on which to operate +/// @param[in] i_rp - the rank pair +/// @param[in] i_abort_on_error - whether or not we are aborting on cal error +/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode mwd::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const +{ + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Executes a cal step with workarounds +/// @param[in] i_target - the MCA target on which to operate +/// @param[in] i_rp - the rank pair +/// @param[in] i_abort_on_error - whether or not we are aborting on cal error +/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok +/// +fapi2::ReturnCode mwd::execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const +{ + return fapi2::FAPI2_RC_SUCCESS; +} + +/// +/// @brief Calculates the number of cycles a given calibration step will take +/// @param[in] i_target - the MCA target on which to operate +/// @return l_cycles - the number of cycles a given calibration step wil take +/// +uint64_t mwd::calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const +{ + return 0; +} + +// TK:LRDIMM update all of this file to have the actual LRDIMM training steps + +} // ns lrdimm + +} // ns training + +} // ns mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.H new file mode 100644 index 000000000..a1c9377b3 --- /dev/null +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.H @@ -0,0 +1,242 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_lrdimm_training.H $ */ +/* */ +/* OpenPOWER HostBoot Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2018 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// +/// @file lib/phy/mss_lrdimm_training.H +/// @brief High level LRDIMM training +/// Training is very device specific, so there is no attempt to generalize +/// this code in any way. +/// +// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com> +// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 2 +// *HWP Consumed by: FSP:HB + +#ifndef MSS_LRDIMM_TRAINING_H +#define MSS_LRDIMM_TRAINING_H + +#include <lib/phy/mss_training.H> + +namespace mss +{ + +namespace training +{ + +namespace lrdimm +{ +// TK:LRDIMM Do we need separate coarse vs fine steps? +/// +/// @brief MREP training step +/// +class mrep : public step +{ + public: + mrep() : + step("MREP") + {} + + /// + /// @brief Default virtual destructor + /// + ~mrep() = default; + + /// + /// @brief Sets up and runs the calibration step + /// @param[in] i_target - the MCA target on which to operate + /// @param[in] i_rp - the rank pair + /// @param[in] i_abort_on_error - whether or not we are aborting on cal error + /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const; + + /// + /// @brief Executes a cal step with workarounds + /// @param[in] i_target - the MCA target on which to operate + /// @param[in] i_rp - the rank pair + /// @param[in] i_abort_on_error - whether or not we are aborting on cal error + /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const; + + /// + /// @brief Calculates the number of cycles a given calibration step will take + /// @param[in] i_target - the MCA target on which to operate + /// @return l_cycles - the number of cycles a given calibration step wil take + /// + uint64_t calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const; +}; + +/// +/// @brief DWL training step +/// +class dwl : public step +{ + public: + dwl() : + step("DWL") + {} + + /// + /// @brief Default virtual destructor + /// + ~dwl() = default; + + /// + /// @brief Sets up and runs the calibration step + /// @param[in] i_target - the MCA target on which to operate + /// @param[in] i_rp - the rank pair + /// @param[in] i_abort_on_error - whether or not we are aborting on cal error + /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const; + + /// + /// @brief Executes a cal step with workarounds + /// @param[in] i_target - the MCA target on which to operate + /// @param[in] i_rp - the rank pair + /// @param[in] i_abort_on_error - whether or not we are aborting on cal error + /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const; + + /// + /// @brief Calculates the number of cycles a given calibration step will take + /// @param[in] i_target - the MCA target on which to operate + /// @return l_cycles - the number of cycles a given calibration step wil take + /// + uint64_t calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const; +}; + +/// +/// @brief MPR training step +/// +class mrd : public step +{ + public: + mrd() : + step("MRD") + {} + + /// + /// @brief Default virtual destructor + /// + ~mrd() = default; + + /// + /// @brief Sets up and runs the calibration step + /// @param[in] i_target - the MCA target on which to operate + /// @param[in] i_rp - the rank pair + /// @param[in] i_abort_on_error - whether or not we are aborting on cal error + /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const; + + /// + /// @brief Executes a cal step with workarounds + /// @param[in] i_target - the MCA target on which to operate + /// @param[in] i_rp - the rank pair + /// @param[in] i_abort_on_error - whether or not we are aborting on cal error + /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const; + + /// + /// @brief Calculates the number of cycles a given calibration step will take + /// @param[in] i_target - the MCA target on which to operate + /// @return l_cycles - the number of cycles a given calibration step wil take + /// + uint64_t calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const; +}; + +/// +/// @brief MPR training step +/// +class mwd : public step +{ + public: + mwd() : + step("MWD") + {} + + /// + /// @brief Default virtual destructor + /// + ~mwd() = default; + + /// + /// @brief Sets up and runs the calibration step + /// @param[in] i_target - the MCA target on which to operate + /// @param[in] i_rp - the rank pair + /// @param[in] i_abort_on_error - whether or not we are aborting on cal error + /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const; + + /// + /// @brief Executes a cal step with workarounds + /// @param[in] i_target - the MCA target on which to operate + /// @param[in] i_rp - the rank pair + /// @param[in] i_abort_on_error - whether or not we are aborting on cal error + /// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok + /// + fapi2::ReturnCode execute( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const uint64_t i_rp, + const uint8_t i_abort_on_error ) const; + + /// + /// @brief Calculates the number of cycles a given calibration step will take + /// @param[in] i_target - the MCA target on which to operate + /// @return l_cycles - the number of cycles a given calibration step wil take + /// + uint64_t calculate_cycles( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ) const; +}; + +// TK:LRDIMM Identify if Host Interface Write Leveling (HWL) Mode needs to be updated or if the PHY can handle it +// TK:LRDIMM Identify if Host Interface Read Training is any different +// TK:LRDIMM Identify if Host Interface Write training Training is any different + +} // ns training + +} // ns lrdimm + +} // ns mss + +#endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C index ae1a824df..da4f2a359 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.C @@ -42,6 +42,7 @@ #include <mss.H> #include <lib/phy/ddr_phy.H> #include <lib/phy/mss_training.H> +#include <lib/phy/mss_lrdimm_training.H> #include <lib/workarounds/dp16_workarounds.H> #include <lib/workarounds/wr_vref_workarounds.H> @@ -56,6 +57,7 @@ #include <lib/shared/mss_const.H> #include <lib/dimm/ddr4/pda.H> #include <lib/phy/seq.H> +#include <lib/phy/read_cntrl.H> namespace mss { @@ -1209,6 +1211,7 @@ fapi_try_exit: /// std::vector<std::shared_ptr<step>> steps_factory(const fapi2::buffer<uint32_t>& i_cal_steps, const bool i_sim) { + // TK:LRDIMM Update the factory to add in LRDIMM training steps std::vector<std::shared_ptr<step>> l_steps; // WR LVL diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.H index 447b2d1d6..c8b9fdeef 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_training.H @@ -40,7 +40,6 @@ #include <fapi2.H> #include <lib/eff_config/timing.H> -#include <lib/phy/read_cntrl.H> #include <lib/dimm/ddr4/latch_wr_vref.H> #include <lib/mss_attribute_accessors.H> diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H index c05d1cb8e..04c84f68c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H @@ -234,6 +234,7 @@ enum states // These are bit positions. 0 is the left most bit. enum cal_steps : uint64_t { + // TK:LRDIMM Update calibration steps to add or remove LRDIMM steps DRAM_ZQCAL = 0, ///< DRAM ZQ Calibration Long DB_ZQCAL = 1, ///< (LRDIMM) Data Buffer ZQ Calibration Long MREP = 2, ///< (LRDIMM) DRAM Interface MDQ Receive Enable Phase @@ -257,6 +258,7 @@ enum cal_steps : uint64_t TRAINING_ADV_RD = 20, ///< Flag for draminit training advance in the attribute/ CUSTOM_READ_CTR in code TRAINING_ADV_WR = 21, ///< Flag for draminit training advance in the attribute/ CUSTOM_WRITE_CTR in code + // TK:LRDIMM Update total calibration steps to have "LRDIMM" specific ones here // Not *exactly* a cal step but go w/it RUN_ALL_CAL_STEPS = 0xFFFFFC00, RUN_CAL_SKIP_WR_RD_2D_VREF = 0xFFFD7C00, diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_bulk_pwr_throttles.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_bulk_pwr_throttles.C index 57b40397b..84cc1c73e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_bulk_pwr_throttles.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_bulk_pwr_throttles.C @@ -45,6 +45,7 @@ using fapi2::TARGET_TYPE_MCA; using fapi2::TARGET_TYPE_DIMM; extern "C" { + // TK:LRDIMM Update power/thermal/throttling /// /// @brief Set ATTR_MSS_PORT_MAXPOWER, ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT, ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT /// @param[in] i_targets vector of MCS's on the same VDDR domain diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C index aa54ff774..d66924504 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C @@ -64,6 +64,7 @@ using fapi2::FAPI2_RC_SUCCESS; extern "C" { + // TK:LRDIMM Update frequency for LRDIMM - I don't think this will change at all, but better safe than sorry SPG /// /// @brief Calculate and save off DIMM frequencies /// @param[in] i_target, the controller (e.g., MCS) diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C index d9a6398ce..e77580a18 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_throttle_mem.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015,2017 */ +/* Contributors Listed Below - COPYRIGHT 2015,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -41,7 +41,7 @@ using fapi2::TARGET_TYPE_MCS; extern "C" { - +// TK:LRDIMM Update power/thermal/throttling /// /// @brief Write the runtime memory throttle settings from attributes to scom registers /// @param[in] i_target the controller target diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.C index 1cf6a8a4a..076cd911c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.C @@ -58,6 +58,7 @@ using fapi2::TARGET_TYPE_DIMM; extern "C" { + // TK:LRDIMM Update power/thermal/throttling /// /// @brief Sets number commands allowed within a given port databus utilization. |
