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| author | Prasad Bg Ranganath <prasadbgr@in.ibm.com> | 2018-02-09 08:10:08 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-03-23 17:53:37 -0400 |
| commit | ec53527cf6363e534639b3fbd2ec21d6b6d987a5 (patch) | |
| tree | 4988590804de0072f4f03584e8f3d1325c639645 /src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C | |
| parent | b8da2d84dff33879af167af26ddff593950231ca (diff) | |
| download | talos-hostboot-ec53527cf6363e534639b3fbd2ec21d6b6d987a5.tar.gz talos-hostboot-ec53527cf6363e534639b3fbd2ec21d6b6d987a5.zip | |
PPB: Update occ min frequency with real driven value
CQ:SW417213
Change-Id: I89f273036d84d656c9253fe9950ece3b0315b968
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53715
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53743
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C index 756daaee7..6a93b052d 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C @@ -813,8 +813,16 @@ p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ l_occppb.vdn_sysparm = l_globalppb.vdn_sysparm; // frequency_min_khz - Value from Power safe operating point after biases + Pstate l_ps; - l_occppb.frequency_min_khz = revle32(attr.attr_pm_safe_frequency_mhz * 1000); + //Translate safe mode frequency to pstate + freq2pState(&l_globalppb, + revle32(attr.attr_pm_safe_frequency_mhz * 1000), + &l_ps, ROUND_FAST); + + //Compute real frequency + l_occppb.frequency_min_khz = l_globalppb.reference_frequency_khz - + (l_ps * l_globalppb.frequency_step_khz); // frequency_max_khz - Value from Ultra Turbo operating point after biases l_occppb.frequency_max_khz = l_globalppb.reference_frequency_khz; @@ -892,6 +900,9 @@ p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_ l_state.iv_wof_enabled = false; } + //Update nest frequency in OPPB + l_occppb.nest_frequency_mhz = l_globalppb.nest_frequency_mhz; + // The minimum Pstate must be rounded FAST so that core floor // constraints are not violated. Pstate pstate_min; |
