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author | Sangeetha T S <sangeet2@in.ibm.com> | 2015-11-02 23:00:52 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-02-22 10:29:00 -0600 |
commit | b622ed1aa67c53f070443981e9b1fe1e3238039b (patch) | |
tree | 3e92b2da737d23ab24e5ba7d62793f47613df85f /src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C | |
parent | d9966a5cc042e4099b6eec88e8318b4509e1f653 (diff) | |
download | talos-hostboot-b622ed1aa67c53f070443981e9b1fe1e3238039b.tar.gz talos-hostboot-b622ed1aa67c53f070443981e9b1fe1e3238039b.zip |
Level 2, FAPI 1.0 to FAPI 2.0 transliteration of p9_pm_pba_bar_config
Change-Id: I2d43e0e87460e84e39f8112573a35a968f8bd402
RTC: 138602
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21888
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24534
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C | 34 |
1 files changed, 4 insertions, 30 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C index 4305fd2b0..4ecd62299 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_set_homer_bar.C @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -23,7 +23,7 @@ // *HWP Backup HWP Owner: Greg Still <stillgs@us.ibm.com> // *HWP FW Owner : Bilicon Patil <bilpatil@in.ibm.com> // *HWP Team : PM -// *HWP Level : 1 +// *HWP Level : 2 // *HWP Consumed by : HS /// /// @@ -137,41 +137,15 @@ p9_pm_set_homer_bar( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_targe fapi2::P9_PM_SET_HOMER_BAR_NOT_1MB_ALIGNED().set_MEM_BAR(i_mem_bar), "ERROR: i_mem_bar:0x%16llx is not 1MB aligned ", i_mem_bar); - // Check that the image address passed is within the memory region that - // is also passed. - // - // The PBA Mask indicates which bits from 23:43 (1MB grandularity) are - // enabled to be passed from the OCI addresses. Inverting this mask - // indicates which address bits are going to come from the PBA BAR value. - // The image address (the starting address) must match these post mask bits - // to be resident in the range. - // - // Starting bit number: 64 bit Big Endian - // 12223344 - // 60482604 - //region_inverted_mask = i_mem_size ^ BAR_MASK_LIMIT; // XOR - - // Set bits 14:22 as these are unconditional address bits - //region_inverted_mask = region_inverted_mask | BAR_ADDR_UNMASKED; - //computed_image_address = region_inverted_mask && image_address; - - // Need to AND the address - //if (computed_image_address != i_mem_bar ) - //{ - // FAPI2_ERR("SLW image address check failure. "); - // FAPI2_SET_HWP_ERROR(l_rc, RC_PROCPM_POREBAR_IMAGE_ADDR_ERROR); - // break; - //} - FAPI_DBG("Calling pba_bar_config with BAR %x Addr: 0x%16llX Size: 0x%16llX", PBA_BAR0, i_mem_bar, i_mem_size); - // Set the PBA BAR for the SLW region + // Set the PBA BAR for the HOMER base FAPI_EXEC_HWP(l_rc, p9_pm_pba_bar_config, i_target, PBA_BAR0, i_mem_bar, i_mem_size, - p9pba::GROUP); + p9pba::GROUP, 0); fapi2::current_err = l_rc; |