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authorSangeetha T S <sangeet2@in.ibm.com>2016-01-12 02:27:55 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2016-06-10 14:51:08 -0400
commitf9901c5de8785999e7771af2d38f450b5bb7e6b8 (patch)
treefc26c5f1de9fbab683399a9617f05d2a07a4b7d2 /src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_sram_init.H
parentee03429471a2edb5e00a47bbcd137494ef0bfb43 (diff)
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p9_pm_occ_sram_init: Level 1 - Initial design of interface
Change-Id: I7bfb8c3fe19bdc78989875ffa94de6152435c036 RTC: 144300 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23224 Tested-by: Jenkins Server Reviewed-by: Gregory S. Still <stillgs@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25633 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/hwp/pm/p9_pm_occ_sram_init.H $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+///
+/// @file p9_pm_occ_sram_init.H
+/// @brief Initialize the SRAM in the OCC
+///
+// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com>
+// *HWP FW Owner: Sangeetha T S <sangeet2@in.ibm.com>
+// *HWP Team: PM
+// *HWP Level: 1
+// *HWP Consumed by: FSP:HS
+//
+
+#ifndef _P9_PM_OCC_SRAM_INIT_H_
+#define _P9_PM_OCC_SRAM_INIT_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi2.H>
+#include <p9_pm.H>
+
+// function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode (*p9_pm_occ_sram_init_FP_t) (
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
+ const p9pm::PM_FLOW_MODE);
+
+extern "C"
+{
+
+//------------------------------------------------------------------------------
+// Function prototype
+//------------------------------------------------------------------------------
+///
+/// @brief Initialize or Reset the OCC SRAM using necessary Platform
+/// or Feature attributes
+///
+/// @param[in] i_target Chip target
+/// @param[in] i_mode Control mode for the procedure (PM_INIT, PM_RESET)
+///
+/// @return FAPI2_RC_SUCCESS on success or error return code
+///
+ fapi2::ReturnCode p9_pm_occ_sram_init(
+ const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+ const p9pm::PM_FLOW_MODE i_mode);
+
+}
+
+#endif // _P9_PM_OCC_SRAM_INIT_H_
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