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author | Sangeetha T S <sangeet2@in.ibm.com> | 2016-01-12 06:28:43 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-06-10 14:51:28 -0400 |
commit | e03071d7cdc4e70499f6ce58fec2418e70d1048b (patch) | |
tree | 214244f49d647e30816dcfb5467e5ea80cc11626 /src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_gpe_init.H | |
parent | f9c2a0ac52eb7bfb8bc80fe311f3e0f98d6c292b (diff) | |
download | talos-hostboot-e03071d7cdc4e70499f6ce58fec2418e70d1048b.tar.gz talos-hostboot-e03071d7cdc4e70499f6ce58fec2418e70d1048b.zip |
p9_pm_occ_gpe_init: Level 2 - Fapi 1.0 to Fapi 2.0 transliteration
Change-Id: Ib132e307eeee13899a1097509dbffd08cdf511b0
RTC: 137028
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23358
Tested-by: Jenkins Server
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25635
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_gpe_init.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_gpe_init.H | 32 |
1 files changed, 21 insertions, 11 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_gpe_init.H b/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_gpe_init.H index 0ceab6e03..64b1eb38b 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_gpe_init.H +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_occ_gpe_init.H @@ -7,7 +7,7 @@ /* */ /* EKB Project */ /* */ -/* COPYRIGHT 2015 */ +/* COPYRIGHT 2015,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -18,28 +18,37 @@ /* IBM_PROLOG_END_TAG */ /// /// @file p9_pm_occ_gpe_init.H -/// @brief Configure or reset the targeted GPE0 and/or GPE1 +/// @brief Initialize or reset the targeted GPE0 and/or GPE1 /// /// *HWP HWP Owner: Greg Still <stillgs@us.ibm.com> -/// *HWP FW Owner: Sunil Kumar <skumar8j@in.ibm.com> +/// *HWP FW Owner: Sangeetha T S <sangeet2@in.ibm.com> /// *HWP Team: PM -/// *HWP Level: 1 +/// *HWP Level: 2 /// *HWP Consumed by: HS /// #ifndef _P9_PM_OCC_GPE_INIT_H #define _P9_PM_OCC_GPE_INIT_H -#include <fapi2.H> -#include <p9_pm.H> - //------------------------------------------------------------------------------ // Includes //------------------------------------------------------------------------------ +#include <fapi2.H> +#include <p9_pm.H> +#include <p9_misc_scom_addresses.H> //------------------------------------------------------------------------------ // Constant definitions //------------------------------------------------------------------------------ +namespace p9occgpe +{ +enum GPE_ENGINES +{ + GPE0 = 0x0, + GPE1 = 0x1, + GPEALL = 0XF +}; +} //------------------------------------------------------------------------------ // Parameter structure definitions @@ -48,8 +57,8 @@ // function pointer typedef definition for HWP call support typedef fapi2::ReturnCode (*p9_pm_occ_gpe_init_FP_t) ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&, - const p9pm::P9_PM_FLOW_MODE, - const uint32_t); + const p9pm::PM_FLOW_MODE, + const p9occgpe::GPE_ENGINES); extern "C" { @@ -61,7 +70,7 @@ extern "C" /// @brief Configure or reset the targeted GPE0 and/or GPE1 /// /// param[in] i_target Chip target -/// param[in] i_mode Control mode for the procedure (PM_CONFIG, PM_RESET) +/// param[in] i_mode Control mode for the procedure (PM_INIT, PM_RESET) /// param[in] i_engine Targeted engine: GPE0, GPE1, GPEALL /// @return FAPI2_RC_SUCCESS in case of success @@ -69,6 +78,7 @@ extern "C" fapi2::ReturnCode p9_pm_occ_gpe_init(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target, - const p9pm::P9_PM_FLOW_MODE i_mode, const uint32_t i_engine); + const p9pm::PM_FLOW_MODE i_mode, + const p9occgpe::GPE_ENGINES i_engine); } //extern "C" #endif // P9_PM_OCC_GPE_INIT_H |