FBC Level 1 procedures

Shells for p9_build_smp, p9_fab_iovalid, p9_smp_link_layer
Supporting attribute definitions

Change-Id: I59f7fb0f13ee190cd790ea5771f4a32faaa165d9
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21570
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23165
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

9 files changed, 491 insertions, 0 deletions

diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C
new file mode 100644
index 000000000..fc3677e26
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.C
@@ -0,0 +1,54 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/hwp/nest/p9_build_smp.C $                 */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file p9_build_smp.C
+/// @brief Perform fabric configuration (FAPI2)
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
+/// @author Christy Graves <clgraves@us.ibm.com>
+///
+
+//
+// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
+// *HWP Team: Nest
+// *HWP Level: 1
+// *HWP Consumed by: HB,FSP
+//
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <p9_build_smp.H>
+
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+
+fapi2::ReturnCode
+p9_build_smp(std::vector<p9_build_smp_proc_chip>& i_proc_chips,
+             const p9_build_smp_operation i_op)
+
+{
+    FAPI_INF("Start");
+    FAPI_INF("End");
+    return fapi2::current_err;
+}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.H b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.H
new file mode 100755
index 000000000..23b8adaad
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.H
@@ -0,0 +1,117 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/hwp/nest/p9_build_smp.H $                 */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file p9_build_smp.H
+/// @brief Perform fabric configuration (FAPI2)
+///
+/// Perform fabric SMP build/reconfiguration operations.
+///
+/// Platform Notes:
+///     This HWP has multiple IPL use cases.  In all all cases the HWP input
+///     is expected to contain an entry for each chip within the scope of
+///     the new SMP to be constructed (with valid attribute state repesenting all
+///     active links that are fully contained within the new SMP).
+///
+///     The p9_build_smp_operation HWP input defines the desired
+///     reconfiguration option to be performed:
+///
+///         SMP_ACTIVATE_PHASE1 (HBI):
+///             o init epsilon registers,
+///             o program FBC configuration dependent registers (switch C/D)
+///             o join all single chip 'island' fabrics into drawer level
+///               SMP (switch A/B)
+///
+///         SMP_ACTIVATE_PHASE2 (FSP):
+///             o join collection of drawer level SMPs into full system SMP
+///               (switch A/B)
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
+/// @author Christy Graves <clgraves@us.ibm.com>
+///
+
+//
+// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
+// *HWP Team: Nest
+// *HWP Level: 1
+// *HWP Consumed by: HB,FSP
+//
+
+#ifndef _P9_BUILD_SMP_H_
+#define _P9_BUILD_SMP_H_
+
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi2.H>
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+// HWP argument, define supported execution modes
+enum p9_build_smp_operation
+{
+    // call from HB (init epsilons, switch C/D + A/B)
+    // used to initialize scope of HBI drawer
+    SMP_ACTIVATE_PHASE1 = 1,
+    // call from FSP (only switch A/B)
+    // used to stitch drawers/CCM
+    SMP_ACTIVATE_PHASE2 = 2
+};
+
+// HWP argument structure defining properties of this chip
+struct p9_build_smp_proc_chip
+{
+    // target for this chip
+    fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> this_chip;
+    // set if this chip should be designated fabric
+    // master post-reconfiguration
+    // NOTE: this chip must currently be designated a
+    //       master in its enclosing fabric
+    //       PHASE1/HB: any chip
+    //       PHASE2/FSP: any current drawer master
+    bool is_master_chip_sys_next;
+};
+
+/// function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode (*p9_build_smp_FP_t) (std::vector<p9_build_smp_proc_chip>&,
+        const p9_build_smp_operation);
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+extern "C"
+{
+
+///
+/// @brief Perform fabric SMP reconfiguration operation
+///
+/// @param[in] i_proc_chips Vector of structures defining properties of each chip
+/// @param[op] i_op Enumerated type representing SMP build phase (HB or FSP)
+/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
+///
+    fapi2::ReturnCode p9_build_smp(std::vector<p9_build_smp_proc_chip>& i_proc_chips,
+                                   const p9_build_smp_operation i_op);
+
+} // extern "C"
+
+#endif // _P9_BUILD_SMP_H_
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.mk b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.mk
new file mode 100644
index 000000000..e50914778
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_build_smp.mk
@@ -0,0 +1,20 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: chips/p9/procedures/hwp/nest/p9_build_smp.mk $
+#
+# IBM CONFIDENTIAL
+#
+# EKB Project
+#
+# COPYRIGHT 2015
+# [+] International Business Machines Corp.
+#
+#
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_build_smp
+$(call BUILD_PROCEDURE)
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C
new file mode 100644
index 000000000..35d75bdf2
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.C
@@ -0,0 +1,53 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/hwp/nest/p9_fab_iovalid.C $               */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file p9_fab_iovalid.C
+/// @brief Manage fabric link iovalid controls (FAPI2)
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
+/// @author Christy Graves <clgraves@us.ibm.com>
+///
+
+//
+// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
+// *HWP Team: Nest
+// *HWP Level: 1
+// *HWP Consumed by: HB,FSP
+//
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <p9_fab_iovalid.H>
+
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+
+fapi2::ReturnCode
+p9_fab_iovalid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+               const bool i_set_not_clear)
+{
+    FAPI_INF("Start");
+    FAPI_INF("End");
+    return fapi2::current_err;
+}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H
new file mode 100755
index 000000000..8841b5745
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.H
@@ -0,0 +1,82 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/hwp/nest/p9_fab_iovalid.H $               */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file p9_fab_iovalid.H
+/// @brief Manage fabric link iovalid controls (FAPI2)
+///
+/// Manage fabric X/A link iovalid controls, which control the
+/// flow of fabric transactions
+///
+/// The iovalid controls are intended to be raised in the IPL flow
+/// after the underlying PHY/DLL/TL layers are running, to start the
+/// broadcast of fabric transactions
+///
+/// The iovalid controls are intended to be lowered prior to stopping
+/// the clocks in the dump process (to provide a clean dump state with
+/// the fabric quiesced)
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
+/// @author Christy Graves <clgraves@us.ibm.com>
+///
+
+//
+// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
+// *HWP Team: Nest
+// *HWP Level: 1
+// *HWP Consumed by: HB,FSP
+//
+
+#ifndef _P9_FAB_IOVALID_H_
+#define _P9_FAB_IOVALID_H_
+
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi2.H>
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+/// function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode (*p9_fab_iovalid_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
+        const bool);
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+extern "C"
+{
+
+///
+/// @brief Raise/lower iovalids for all logically enabled links on a single chip
+///
+/// @param[in] i_target Reference to processor chip target
+/// @param[op] i_set_not_clear Define iovalid operation (true=set, false=clear)
+/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
+///
+    fapi2::ReturnCode p9_fab_iovalid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
+                                     const bool i_set_not_clear);
+
+} // extern "C"
+
+#endif // _P9_FAB_IOVALID_H_
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.mk b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.mk
new file mode 100644
index 000000000..45a48c209
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_fab_iovalid.mk
@@ -0,0 +1,20 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: chips/p9/procedures/hwp/nest/p9_fab_iovalid.mk $
+#
+# IBM CONFIDENTIAL
+#
+# EKB Project
+#
+# COPYRIGHT 2015
+# [+] International Business Machines Corp.
+#
+#
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_fab_iovalid
+$(call BUILD_PROCEDURE)
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.C b/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.C
new file mode 100644
index 000000000..75b5b5a9e
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.C
@@ -0,0 +1,52 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/hwp/nest/p9_smp_link_layer.C $            */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file p9_smp_link_layer.C
+/// @brief Enable fabric link/transaction layers (FAPI2)
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
+/// @author Christy Graves <clgraves@us.ibm.com>
+///
+
+//
+// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
+// *HWP Team: Nest
+// *HWP Level: 1
+// *HWP Consumed by: HB,FSP
+//
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <p9_smp_link_layer.H>
+
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+
+fapi2::ReturnCode
+p9_smp_link_layer(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target)
+{
+    FAPI_INF("Start");
+    FAPI_INF("End");
+    return fapi2::current_err;
+}
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.H b/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.H
new file mode 100755
index 000000000..462541419
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.H
@@ -0,0 +1,73 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: chips/p9/procedures/hwp/nest/p9_smp_link_layer.H $            */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* EKB Project                                                            */
+/*                                                                        */
+/* COPYRIGHT 2015                                                         */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+///
+/// @file p9_smp_link_layer.H
+/// @brief Enable fabric link/transaction layers (FAPI2)
+///
+/// Enable fabric X/A data link (DL) and transaction (TL) layers
+///
+/// Procedure should enable use of link TL mailbox
+///
+/// @author Joe McGill <jmcgill@us.ibm.com>
+/// @author Christy Graves <clgraves@us.ibm.com>
+///
+
+//
+// *HWP HWP Owner: Joe McGill <jmcgill@us.ibm.com>
+// *HWP FW Owner: Thi Tran <thi@us.ibm.com>
+// *HWP Team: Nest
+// *HWP Level: 1
+// *HWP Consumed by: HB,FSP
+//
+
+#ifndef _P9_SMP_LINK_LAYER_H_
+#define _P9_SMP_LINK_LAYER_H_
+
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi2.H>
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+/// function pointer typedef definition for HWP call support
+typedef fapi2::ReturnCode (*p9_smp_link_layer_FP_t) (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&);
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+extern "C"
+{
+
+///
+/// @brief Enable fabric data link/transaction layers, for all logically enabled links on a single chip
+///
+/// @param[in] i_target Reference to processor chip target
+/// @return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
+///
+    fapi2::ReturnCode p9_smp_link_layer(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target);
+
+
+} // extern "C"
+
+#endif // _P9_SMP_LINK_LAYER_H_
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.mk b/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.mk
new file mode 100644
index 000000000..cbd94aa67
--- /dev/null
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_smp_link_layer.mk
@@ -0,0 +1,20 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: chips/p9/procedures/hwp/nest/p9_smp_link_layer.mk $
+#
+# IBM CONFIDENTIAL
+#
+# EKB Project
+#
+# COPYRIGHT 2015
+# [+] International Business Machines Corp.
+#
+#
+# The source code for this program is not published or otherwise
+# divested of its trade secrets, irrespective of what has been
+# deposited with the U.S. Copyright Office.
+#
+# IBM_PROLOG_END_TAG
+PROCEDURE=p9_smp_link_layer
+$(call BUILD_PROCEDURE)