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| author | Stephen Glancy <sglancy@us.ibm.com> | 2020-01-24 16:35:25 -0500 |
|---|---|---|
| committer | Daniel M Crowell <dcrowell@us.ibm.com> | 2020-02-13 15:31:14 -0600 |
| commit | 97fc5523bba37078bca09dec8ddecc6724f914aa (patch) | |
| tree | ad25e0abf3a161322b5e2b6a45cbc8c0821d89d1 /src/import/chips/p9/procedures/hwp/memory | |
| parent | c5263088b2d20e59e362c47480e21afb2c356840 (diff) | |
| download | talos-hostboot-97fc5523bba37078bca09dec8ddecc6724f914aa.tar.gz talos-hostboot-97fc5523bba37078bca09dec8ddecc6724f914aa.zip | |
Adds MCBIST functional verification tests
Change-Id: I122de19702ea9a7e30534d752925c1498012bf2f
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/90791
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com>
Reviewed-by: ANDRE A MARIN <aamarin@us.ibm.com>
Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/90815
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H index c57ededbe..7d9d3ab2c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist_traits.H @@ -300,6 +300,10 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST> enum { + // The start/end address config registers have common lengths and bits, just including 1 below + MCB_ADDR_CONFIG = MCBIST_MCBEA0Q_CFG_END_ADDR_0, + MCB_ADDR_CONFIG_LEN = MCBIST_MCBEA0Q_CFG_END_ADDR_0_LEN, + // Subtest control bits. These are the same in all '16 bit subtest' field COMPL_1ST_CMD = MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_1ST_CMD, COMPL_2ND_CMD = MCBIST_MCBMR0Q_MCBIST_CFG_TEST00_COMPL_2ND_CMD, @@ -557,6 +561,7 @@ class mcbistTraits<mss::mc_type::NIMBUS, fapi2::TARGET_TYPE_MCBIST> MCB_WAT_DEBUG_ATTN = MCBIST_MCBISTFIRQ_WAT_DEBUG_ATTN, MCB_PROGRAM_COMPLETE_MASK = MCB_PROGRAM_COMPLETE, MCB_WAT_DEBUG_ATTN_MASK = MCB_WAT_DEBUG_ATTN, + MCB_DATA_ERROR = MCBIST_MCBISTFIRQ_MCBIST_DATA_ERROR, //XLT address valid offset XLT0_SLOT1_D_VALID = MCS_PORT13_MCP0XLT0_SLOT1_VALID, |
