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authorLouis Stermole <stermole@us.ibm.com>2018-01-30 08:47:48 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2018-02-06 23:38:42 -0500
commit1d565299ec312208104cdaf80f63ab5a2e49eb98 (patch)
treed311bc017b35b3f4bd5fe3d79d264782d7a83b9b /src/import/chips/p9/procedures/hwp/memory
parent9aee6dc5b82ad828006ef12c4742b98a3700b7ba (diff)
downloadtalos-hostboot-1d565299ec312208104cdaf80f63ab5a2e49eb98.tar.gz
talos-hostboot-1d565299ec312208104cdaf80f63ab5a2e49eb98.zip
Add plug rule for dual-drop DIMM configs that produce different xlate settings
Change-Id: Ief41995350e46386ed592d4c03dfc1f05e942a5c CQ: SW416081 RTC: 186549 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52972 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53194 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C50
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H11
2 files changed, 61 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
index f3230ef8b..c65d3a5e9 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
@@ -82,6 +82,53 @@ fapi_try_exit:
return fapi2::current_err;
}
+///
+/// @brief Enforce equivalent rank and row configs
+/// Enforces configurations which will produce equivalent xlate register settings
+/// @param[in] i_target the port
+/// @param[in] i_kinds a vector of DIMM
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note Expects the kind array to represent the DIMM on the port.
+///
+fapi2::ReturnCode check_xlate_config(const fapi2::Target<TARGET_TYPE_MCA>& i_target,
+ const std::vector<dimm::kind>& i_kinds)
+{
+ if (i_kinds.size() > 1)
+ {
+ FAPI_ASSERT( i_kinds[0].equal_config(i_kinds[1]) == true,
+ fapi2::MSS_PLUG_RULES_DIFFERENT_XLATE()
+ .set_MASTER_RANKS_ON_DIMM0(i_kinds[0].iv_master_ranks)
+ .set_MASTER_RANKS_ON_DIMM1(i_kinds[1].iv_master_ranks)
+ .set_TOTAL_RANKS_ON_DIMM0(i_kinds[0].iv_total_ranks)
+ .set_TOTAL_RANKS_ON_DIMM1(i_kinds[1].iv_total_ranks)
+ .set_DRAM_DENSITY_ON_DIMM0(i_kinds[0].iv_dram_density)
+ .set_DRAM_DENSITY_ON_DIMM1(i_kinds[1].iv_dram_density)
+ .set_DRAM_WIDTH_ON_DIMM0(i_kinds[0].iv_dram_width)
+ .set_DRAM_WIDTH_ON_DIMM1(i_kinds[1].iv_dram_width)
+ .set_DRAM_GEN_ON_DIMM0(i_kinds[0].iv_dram_generation)
+ .set_DRAM_GEN_ON_DIMM1(i_kinds[1].iv_dram_generation)
+ .set_DIMM_TYPE_ON_DIMM0(i_kinds[0].iv_dimm_type)
+ .set_DIMM_TYPE_ON_DIMM1(i_kinds[1].iv_dimm_type)
+ .set_ROWS_ON_DIMM0(i_kinds[0].iv_rows)
+ .set_ROWS_ON_DIMM1(i_kinds[1].iv_rows)
+ .set_SIZE_ON_DIMM0(i_kinds[0].iv_size)
+ .set_SIZE_ON_DIMM1(i_kinds[1].iv_size)
+ .set_MCA_TARGET(i_target),
+ "%s has two different configurations of DIMM installed. mranks=%d,%d ranks=%d,%d density=%d,%d width=%d,%d gen=%d,%d type=%d,%d rows=%d,%d size=%d,%d Cannot mix DIMM configurations on port",
+ mss::c_str(i_target), i_kinds[0].iv_master_ranks, i_kinds[1].iv_master_ranks,
+ i_kinds[0].iv_total_ranks, i_kinds[1].iv_total_ranks,
+ i_kinds[0].iv_dram_density, i_kinds[1].iv_dram_density,
+ i_kinds[0].iv_dram_width, i_kinds[1].iv_dram_width,
+ i_kinds[0].iv_dram_generation, i_kinds[1].iv_dram_generation,
+ i_kinds[0].iv_dimm_type, i_kinds[1].iv_dimm_type,
+ i_kinds[0].iv_rows, i_kinds[1].iv_rows,
+ i_kinds[0].iv_size, i_kinds[1].iv_size);
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
} // code
///
@@ -721,6 +768,9 @@ fapi2::ReturnCode plug_rule::enforce_plug_rules(const fapi2::Target<fapi2::TARGE
// Checks to see if any DIMM are LRDIMM
FAPI_TRY( plug_rule::code::check_lrdimm(l_dimm_kinds) );
+ // Temporary check that xlate settings will be the same if there are two DIMM in the port
+ FAPI_TRY( plug_rule::code::check_xlate_config(i_target, l_dimm_kinds) );
+
fapi_try_exit:
return fapi2::current_err;
}
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H
index aabc7b09f..c0ef3709d 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H
@@ -214,6 +214,17 @@ namespace code
///
fapi2::ReturnCode check_lrdimm( const std::vector<dimm::kind>& i_kinds );
+///
+/// @brief Enforce equivalent rank and row configs
+/// Enforces configurations which will produce equivalent xlate register settings
+/// @param[in] i_target the port
+/// @param[in] i_kinds a vector of DIMM
+/// @return fapi2::FAPI2_RC_SUCCESS if okay
+/// @note Expects the kind array to represent the DIMM on the port.
+///
+fapi2::ReturnCode check_xlate_config(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+ const std::vector<dimm::kind>& i_kinds);
+
} // code
} // plug_rule
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