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authorJacob Harvey <jlharvey@us.ibm.com>2017-07-10 16:42:09 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-08-18 10:52:26 -0400
commit25a46875b4bd8e7da5d5b2e342467ee2183e228b (patch)
tree0a5f26174ebbcb86dbe1fb407b79404dfa9a7708 /src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C
parentd4c08be2b76339d60f098968bfe05f5a34a19c0b (diff)
downloadtalos-hostboot-25a46875b4bd8e7da5d5b2e342467ee2183e228b.tar.gz
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L3 work for mss xmls
mss_spd, mss_volt, mss_general, mss_data_buffer, mss_update_errors Change-Id: I1252d6d11900e88e0842c234c5ed815063e68ec0 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42962 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44229 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C
index 77c9afd6c..04a6c0b34 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_volt.C
@@ -29,7 +29,6 @@
///
// *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com>
// *HWP HWP Backup: Andre A. Marin <aamarin@us.ibm.com>
-// *HWP FW Owner: Brian Silver <bsilver@us.ibm.com>
// *HWP Team: Memory
// *HWP Level: 3
// *HWP Consumed by: FSP:HB
@@ -90,18 +89,21 @@ extern "C"
//Check to make sure 1.2 V is both operable and endurant, fail if it is not
FAPI_ASSERT ( (l_dimm_nominal == mss::spd::OPERABLE) && (l_dimm_endurant == mss::spd::ENDURANT),
fapi2::MSS_VOLT_DDR_TYPE_REQUIRED_VOLTAGE().
- set_OPERABLE(l_dimm_nominal).
- set_ENDURANT(l_dimm_endurant).
+ set_ACTUAL_OPERABLE(l_dimm_nominal).
+ set_ACTUAL_ENDURANT(l_dimm_endurant).
+ set_EXPECTED_OPERABLE(mss::spd::OPERABLE).
+ set_EXPECTED_ENDURANT(mss::spd::ENDURANT).
set_DIMM_TARGET(l_cache->iv_target),
- "%s: DIMM is not operable (%d)"
- " and/or endurant (%d) at 1.2V",
+ "%s: DIMM is not operable (%d) expected (%d)"
+ " and/or endurant (%d) expected (%d) at 1.2V",
mss::c_str(l_cache->iv_target),
l_dimm_nominal,
- l_dimm_endurant);
+ mss::spd::OPERABLE,
+ l_dimm_endurant,
+ mss::spd::ENDURANT);
} // l_dimm
// Set the attributes for this MCS, values are in mss_const.H
- // TK : will need to change attribute target according to voltage rails in the future
FAPI_TRY (mss::set_voltage_attributes (l_mcs,
mss::DDR4_NOMINAL_VOLTAGE,
mss::DDR4_VPP_VOLTAGE),
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