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authorJacob Harvey <jlharvey@us.ibm.com>2017-01-20 12:13:47 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-06-08 12:26:44 -0400
commit4fe87595dd09056980825636a2f37340ed8b0f20 (patch)
tree8a243779d128e701dca8a6fc69f657094e2959e3 /src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H
parent25f2352f182e610d1f3097484133167f623926fa (diff)
downloadtalos-hostboot-4fe87595dd09056980825636a2f37340ed8b0f20.tar.gz
talos-hostboot-4fe87595dd09056980825636a2f37340ed8b0f20.zip
Cleaning up and implementing L3 eff_config_thermal
Change-Id: I16a1ce610d9e80b7a1f666ef412198c67c8b69a7 Original-Change-Id: Id780f75931e4522726e95191a3e56760edcc3af5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35166 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: Michael D. Pardeik <pardeik@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41508 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H16
1 files changed, 9 insertions, 7 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H
index 761b1d3e6..94ab34a4f 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_utils_to_throttle.H
@@ -31,9 +31,9 @@
///
// *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com>
-// *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Backup: Andre A. Marin <aamarin@us.ibm.com>
// *HWP Team: Memory
-// *HWP Level: 1
+// *HWP Level: 3
// *HWP Consumed by: FSP:HB
#ifndef __P9_MSS_UTILS_TO_THROTTLE__
@@ -48,11 +48,13 @@ typedef fapi2::ReturnCode (*p9_mss_utils_to_throttle_FP_t) (const
extern "C"
{
-///
-/// @brief Set the N throttle attributes for a given dram data bus utilization.
-/// @param[in] i_targets vector of MCS on the same VDDR domain
-/// @return FAPI2_RC_SUCCESS iff ok
-/// @note throttle_per_slot will be equalized so all throttles coming out will be equal to worst case
+ ///
+ /// @brief Sets number commands allowed within a given port databus utilization.
+ /// @param[in] i_targets vector of MCS to set throttle attributes on
+ /// @return FAPI2_RC_SUCCESS iff ok
+ /// @note ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT will be set to worst case of all slots passed in
+ /// @note output ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_SLOT, ATTR_MSS_MEM_THROTTLED_N_COMMANDS_PER_PORT, and ATTR_MSS_PORT_MAXPOWER
+ ///
fapi2::ReturnCode p9_mss_utils_to_throttle( const std::vector <fapi2::Target<fapi2::TARGET_TYPE_MCS> >& i_targets );
}
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