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| author | Andre Marin <aamarin@us.ibm.com> | 2016-06-06 06:25:47 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-07-13 14:22:22 -0400 |
| commit | cf311d5d2bc2f360cbe8f963a59b998c35789ec8 (patch) | |
| tree | 1215ccfce82397c899002c5cba91114544df85e6 /src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H | |
| parent | 3e93039cb39045960d20306da94a20a4885cf67f (diff) | |
| download | talos-hostboot-cf311d5d2bc2f360cbe8f963a59b998c35789ec8.tar.gz talos-hostboot-cf311d5d2bc2f360cbe8f963a59b998c35789ec8.zip | |
Modify SPD blob and eff-config hardcoding to match VBU
Change-Id: If663431e64cb3432b4a77949e7a8cdc26b8eb35f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25970
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Brian R. Silver <bsilver@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25971
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H index fd9304dd5..dae20eda2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H @@ -76,10 +76,6 @@ inline fapi2::ReturnCode set_CL_attr(const fapi2::Target<fapi2::TARGET_TYPE_MCS> { // Declaration of the vector correctly initializes it to the right size // in the case the enum for PORTS_PER_MCS changes - - // RIT hackey to match the attribute file (likely fakeSPD is wrong) BRS - i_cas_latency = 0x10; - std::vector<uint8_t> l_cls_vect(PORTS_PER_MCS, uint8_t(i_cas_latency) ); // set CAS latency attribute @@ -105,9 +101,9 @@ inline fapi2::ReturnCode set_freq_attrs(const fapi2::Target<fapi2::TARGET_TYPE_M { // TK - RIT, needsto be corrected uint64_t l_nest_freq = 2; - const auto l_mcbist = i_target.getParent<fapi2::TARGET_TYPE_MCBIST>(); + const auto l_mcbist = mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target); - FAPI_DBG("setting freq attrs for %s", mss::c_str(i_target)); + FAPI_INF("Setting freq attrs for %s", mss::c_str(i_target)); // TK //Update for P9, what do we do w/setting nest freq? - AAM |
