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author | Brian Silver <bsilver@us.ibm.com> | 2015-12-28 11:26:59 -0600 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-02-22 09:42:21 -0600 |
commit | 13cadbe07510f7e7896c5c7c3cfd191a7075491e (patch) | |
tree | ee27b4cbf2f73575ab62d0c65a9faa5030a655b0 /src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.H | |
parent | f6700762b490d9caf3a62f5d078859ca242701b6 (diff) | |
download | talos-hostboot-13cadbe07510f7e7896c5c7c3cfd191a7075491e.tar.gz talos-hostboot-13cadbe07510f7e7896c5c7c3cfd191a7075491e.zip |
Initial commit of memory subsystem
Change-Id: I6b63d2c4eec5d77585c91d905a464962a6153a0a
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22978
Tested-by: Jenkins Server
Reviewed-by: Craig C. Hamilton <cchamilt@us.ibm.com>
Reviewed-by: Brian Silver <bsilver@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24518
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.H')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.H | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.H index 5edf9ec5b..99224df38 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.H +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.H @@ -21,11 +21,10 @@ /// @file p9_mss_draminit.H /// @brief Reset and initialze DRAM /// -// *HWP HWP Owner: Luke Mulkey <lwmulkey@us.ibm.com> +// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com> // *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> -// *HWP FW Owner: Brian Silver <bsilver@us.ibm.com> // *HWP Team: Memory -// *HWP Level: 1 +// *HWP Level: 2 // *HWP Consumed by: FSP:HB #ifndef __P9_MSS_DRAMINIT__ @@ -39,8 +38,8 @@ extern "C" { /// -/// @brief Initialize dram -/// @param[in] i_target, the McBIST of the ports of the dram you're training +/// @brief Initialize dram, assumes effective config has run +/// @param[in] i_target, the McBIST of the ports of the dram you're initializing /// @return FAPI2_RC_SUCCESS iff ok /// fapi2::ReturnCode p9_mss_draminit( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target ); |