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author | Claus Michael Olsen <cmolsen@us.ibm.com> | 2017-07-16 09:51:43 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-04-05 09:31:43 -0400 |
commit | e286748a94bde253ec0d0d5bfae7d1df99393546 (patch) | |
tree | 2d13581564bea3b6607aa1caff632291ddc59d7e /src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C | |
parent | 3661916096ea58e7a99f031a46982106d593a0b2 (diff) | |
download | talos-hostboot-e286748a94bde253ec0d0d5bfae7d1df99393546.tar.gz talos-hostboot-e286748a94bde253ec0d0d5bfae7d1df99393546.zip |
Code restruct: ring_apply
- Consolidating the three <ppe>_image_ring_generation functions
into a single shared, and renamed, ring_section_generation
function,
- Moving several data centric functions into common_ringId API,
- Use of sizeof(<type or var>) instead of hardcoded assumptions
about structure or data type sizes,
- Renaming of variables which makes sense in the context of the
scope of this commit, such as:
- ringBuffer renamed to ringSection
- ringBufSize renamed to ringSectionSize and type changed to
uint32_t
- Removes the backward compatibility to TORV3/V4 and now only
works with latest TOR version, i.e. 6 at this point.
About the Hw_ImageBuild_Prereq:
- 51511 must have fully propagated into all repos and drivers
used in FSP CI tests before this commit (43175) can be merged.
43175 removes the TORV3/V4 backwards compatibility to support
TOR ring sections that have TOR level DD coordination.
Key_Cronus_Test=XIP_REGRESS
Change-Id: I0af25fa623c1c523eb0297e475066497787f3d15
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43175
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52211
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C')
0 files changed, 0 insertions, 0 deletions