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| author | Andre Marin <aamarin@us.ibm.com> | 2017-04-28 17:15:31 -0500 |
|---|---|---|
| committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-05-12 21:13:15 -0400 |
| commit | 04e2dd7b90abd697b61a956a56d76a5fb7121df6 (patch) | |
| tree | 48648c2acfe37372f22a936f9a65f9be74503454 /src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C | |
| parent | 8ebb4363270fd6bafa4c21413413a68b5778f348 (diff) | |
| download | talos-hostboot-04e2dd7b90abd697b61a956a56d76a5fb7121df6.tar.gz talos-hostboot-04e2dd7b90abd697b61a956a56d76a5fb7121df6.zip | |
Add DLL workaround and unit tests
Change-Id: I142ecd417abb92f4f8ec7d3748563b30359c486d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39673
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39677
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C index 22ae9b1ba..ab6dc8548 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C @@ -43,6 +43,7 @@ #include <lib/utils/count_dimm.H> #include <lib/phy/adr32s.H> #include <lib/workarounds/dp16_workarounds.H> +#include <lib/workarounds/dll_workarounds.H> #include <lib/fir/check.H> #include <lib/fir/unmask.H> @@ -109,8 +110,20 @@ extern "C" // and DDRPHY_ADR_DLL_CNTL registers // 15. Monitor the DDRPHY_PC_DLL_ZCAL_CAL_STATUS register to determine when calibration is // complete. One of the 3 bits will be asserted for ADR and DP16. - FAPI_INF( "starting DLL calibration %s", mss::c_str(i_target) ); - FAPI_TRY( mss::dll_calibration(i_target) ); + { + FAPI_INF( "starting DLL calibration %s", mss::c_str(i_target) ); + fapi2::ReturnCode l_rc = mss::dll_calibration(i_target); + + // Only run DLL workaround if we fail DLL cal and we are a < DD2.0 part + if( l_rc != fapi2::FAPI2_RC_SUCCESS && + mss::chip_ec_feature_mss_dll_workaround(i_target) ) + { + FAPI_INF( "%s Applying DLL workaround", mss::c_str(i_target) ); + l_rc = mss::workarounds::dll::fix_bad_voltage_settings(i_target); + } + + FAPI_TRY( l_rc, "Failed DLL calibration" ); + } // // Start bang-bang-lock |
