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author | Brian Silver <bsilver@us.ibm.com> | 2016-08-22 08:44:42 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-24 23:45:46 -0400 |
commit | e6059f6594051106f13391d2967ef7f37aa4ec29 (patch) | |
tree | c4c66edfb8803d7598bfe3b671fb588114131156 /src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C | |
parent | 04b10dfde23c8c88e8036ac7f70bab8c308000fd (diff) | |
download | talos-hostboot-e6059f6594051106f13391d2967ef7f37aa4ec29.tar.gz talos-hostboot-e6059f6594051106f13391d2967ef7f37aa4ec29.zip |
Add f/w implementation of PHY duty cycle distortion cal
Change-Id: Ie15b5e674ed4285e8d76ca1583b9b1feaf120c3d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28605
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28606
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C index d54ac8084..e6b9fbeda 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C @@ -41,6 +41,7 @@ #include <p9_mss_ddr_phy_reset.H> #include <lib/utils/count_dimm.H> +#include <lib/phy/adr32s.H> using fapi2::TARGET_TYPE_MCBIST; @@ -64,13 +65,15 @@ extern "C" return fapi2::FAPI2_RC_SUCCESS; } - // Initialize via scoms. Could be put in to p9_mss_scominit.C if that ever exists BRS. + // Initialize via scoms. Could be put in to p9_mss_scominit.C FAPI_TRY( mss::phy_scominit(i_target) ); FAPI_TRY(mss::change_force_mclk_low(i_target, mss::HIGH), "force_mclk_low (set high) Failed rc = 0x%08X", uint64_t(fapi2::current_err) ); - // + // New for Nimbus - perform duty cycle clock distortion calibration + FAPI_TRY( mss::adr32s::duty_cycle_distortion_calibration(i_target) ); + // 1. Drive all control signals to the PHY to their inactive state, idle state, or inactive value. FAPI_TRY( mss::dp16::reset_sysclk(i_target) ); |