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author | Andre Marin <aamarin@us.ibm.com> | 2017-08-30 10:42:08 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-09-25 22:16:03 -0400 |
commit | 7085e6bb6afc0c22ac6b0bb5f2e67b59d1d0f993 (patch) | |
tree | 2a1d0a417eaa76579f20123c213810b57829705e /src/import/chips/p9/procedures/hwp/memory/lib | |
parent | 84e9979022484372224d5b1a4ed44d7d2989bfe3 (diff) | |
download | talos-hostboot-7085e6bb6afc0c22ac6b0bb5f2e67b59d1d0f993.tar.gz talos-hostboot-7085e6bb6afc0c22ac6b0bb5f2e67b59d1d0f993.zip |
Add Write CRC attributes to xml and eff_dimm
Added ATTR_EFF_PACKAGE_RANK_MAP, ATTR_EFF_NIBBLE_MAP, and
ATTR_MSS_EFF_WR_CRC attributes.
Change-Id: Ib665e22ce755282afb012ca0df9c670770fa1dd6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45386
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Matt K. Light <mklight@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45406
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/import/chips/p9/procedures/hwp/memory/lib')
5 files changed, 370 insertions, 2 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index 1e5706714..097ffc26c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -3374,6 +3374,96 @@ fapi_try_exit: } /// +/// @brief Determines & sets effective config for nibble +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_dimm::nibble_map() +{ + uint8_t l_attr[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_DQ_NIBBLES] = {}; + + std::vector<uint8_t> l_nibble_bitmap; + FAPI_TRY( iv_pDecoder->nibble_map(l_nibble_bitmap) ); + + // Sanity check we retrieved a vector w/the right size + FAPI_ASSERT( l_nibble_bitmap.size() == MAX_DQ_NIBBLES, + fapi2::MSS_UNEXPECTED_VALUE_SEEN(). + set_TARGET(iv_dimm). + set_EXPECTED(MAX_DQ_NIBBLES). + set_ACTUAL(l_nibble_bitmap.size()). + set_FUNCTION(NIBBLE_MAP_FUNC), + "Expected vector size %d, actual size %d for %s", + MAX_DQ_NIBBLES, l_nibble_bitmap.size(), mss::c_str(iv_dimm) ); + + // Get & update MCS attribute + FAPI_TRY( eff_nibble_map(iv_mcs, &l_attr[0][0][0]) ); + + memcpy(&(l_attr[iv_port_index][iv_dimm_index][0]), l_nibble_bitmap.data(), MAX_DQ_NIBBLES); + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_NIBBLE_MAP, iv_mcs, l_attr), + "Failed setting attribute ATTR_EFF_NIBBLE_MAP for %s", mss::c_str(iv_mcs)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for the package rank map +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// +fapi2::ReturnCode eff_dimm::package_rank_map() +{ + uint8_t l_attr[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_DQ_NIBBLES] = {}; + + std::vector<uint8_t> l_package_rank_map; + FAPI_TRY( iv_pDecoder->package_rank_map(l_package_rank_map) ); + + // Sanity check we retrieved a vector w/the right size + FAPI_ASSERT( l_package_rank_map.size() == MAX_DQ_NIBBLES, + fapi2::MSS_UNEXPECTED_VALUE_SEEN(). + set_TARGET(iv_dimm). + set_EXPECTED(MAX_DQ_NIBBLES). + set_ACTUAL(l_package_rank_map.size()). + set_FUNCTION(PACKAGE_RANK_MAP_FUNC), + "Expected vector size %d, actual size %d for %s", + MAX_DQ_NIBBLES, l_package_rank_map.size(), mss::c_str(iv_dimm) ); + + // Get & update MCS attribute + FAPI_TRY( eff_package_rank_map(iv_mcs, &l_attr[0][0][0]) ); + + memcpy(&(l_attr[iv_port_index][iv_dimm_index][0]), l_package_rank_map.data(), MAX_DQ_NIBBLES); + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_PACKAGE_RANK_MAP, iv_mcs, l_attr), + "Failed setting attribute ATTR_EFF_PACKAGE_RANK_MAP for %s", mss::c_str(iv_mcs)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// +/// @brief Determines & sets effective config for the wr_crc +/// @return fapi2::FAPI2_RC_SUCCESS if okay +/// @warning eff_package_rank_map must be set before calling this method +/// +fapi2::ReturnCode eff_dimm::wr_crc() +{ + uint8_t l_attr[PORTS_PER_MCS] = {}; + + // Get & update MCS attribute + FAPI_TRY( eff_wr_crc(iv_mcs, &l_attr[0]) ); + + // By default write CRC will be disabled. For us to actually enable it in a product, + // we'd have to be taking more bit flips on the write data interface than scrub can keep up with, + // plus we'd have to take the performance hit of enabling it... so pretty high bar to enable it. + l_attr[iv_port_index] = fapi2::ENUM_ATTR_MSS_EFF_WR_CRC_DISABLE; + + FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_MSS_EFF_WR_CRC, iv_mcs, l_attr), + "Failed setting attribute ATTR_MSS_EFF_WR_CRC for %s", mss::c_str(iv_mcs)); + +fapi_try_exit: + return fapi2::current_err; +} + +/// /// @brief Determines & sets effective config for tRRD_S /// @return fapi2::FAPI2_RC_SUCCESS if okay /// diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H index d4f058100..b0de045ed 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.H @@ -692,6 +692,24 @@ class eff_dimm fapi2::ReturnCode dram_twtr_s(); /// + /// @brief Determines & sets effective config for the nibble map + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode nibble_map(); + + /// + /// @brief Determines & sets effective config for the package rank map + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode package_rank_map(); + + /// + /// @brief Determines & sets effective config for the wr_crc + /// @return fapi2::FAPI2_RC_SUCCESS if okay + /// + fapi2::ReturnCode wr_crc(); + + /// /// @brief Determines & sets effective config for tRRD_S (tRRD_S_slr) /// @return fapi2::FAPI2_RC_SUCCESS if okay /// diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C index 3a4c5b998..413271041 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C @@ -418,7 +418,7 @@ fapi2::ReturnCode restore_repairs_helper<fapi2::TARGET_TYPE_DIMM, MAX_RANK_PER_D repair_state_machine<fapi2::TARGET_TYPE_DIMM> l_machine; // loop through bytes - for (uint64_t l_byte = 0; l_byte < (MAX_DQ_NIBBLES_X4 / NIBBLES_PER_BYTE); ++l_byte) + for (uint64_t l_byte = 0; l_byte < (MAX_DQ_NIBBLES / NIBBLES_PER_BYTE); ++l_byte) { for (size_t l_nibble = 0; l_nibble < NIBBLES_PER_BYTE; ++l_nibble) { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index e589963df..8c0b79105 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -17402,6 +17402,82 @@ fapi_try_exit: } /// +/// @brief ATTR_MSS_EFF_WR_CRC getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Controls ENABLE/DISABLE of Write +/// CRC +/// +inline fapi2::ReturnCode eff_wr_crc(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_WR_CRC, i_target.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) ); + o_value = l_value[mss::index(i_target)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_WR_CRC: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_WR_CRC getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> +/// @param[out] ref to the value uint8_t +/// @note Generated by gen_accessors.pl generateParameters (D.1) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Controls ENABLE/DISABLE of Write +/// CRC +/// +inline fapi2::ReturnCode eff_wr_crc(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value) +{ + uint8_t l_value[2]; + auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_WR_CRC, l_mca.getParent<fapi2::TARGET_TYPE_MCS>(), l_value) ); + o_value = l_value[mss::index(l_mca)]; + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_WR_CRC: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_MSS_EFF_WR_CRC getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (E) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Controls ENABLE/DISABLE of Write +/// CRC +/// +inline fapi2::ReturnCode eff_wr_crc(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_EFF_WR_CRC, i_target, l_value) ); + memcpy(o_array, &l_value, 2); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_MSS_EFF_WR_CRC: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// /// @brief ATTR_MSS_PHY_SEQ_REFRESH getter /// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> /// @param[out] ref to the value uint8_t @@ -20277,6 +20353,186 @@ fapi_try_exit: return fapi2::current_err; } +/// +/// @brief ATTR_EFF_PACKAGE_RANK_MAP getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Package Rank Map Decodes SPD Byte 60 - 77 (Bits 7~6) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_package_rank_map(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); + auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PACKAGE_RANK_MAP, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 18); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_PACKAGE_RANK_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_PACKAGE_RANK_MAP getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (B) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Package Rank Map Decodes SPD Byte 60 - 77 (Bits 7~6) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_package_rank_map(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PACKAGE_RANK_MAP, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 36); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_PACKAGE_RANK_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_PACKAGE_RANK_MAP getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (C) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Package Rank Map Decodes SPD Byte 60 - 77 (Bits 7~6) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_package_rank_map(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_PACKAGE_RANK_MAP, i_target, l_value) ); + memcpy(o_array, &l_value, 72); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_PACKAGE_RANK_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NIBBLE_MAP getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (A) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Nibble Map Decodes SPD Byte 60 - 77 (Bits 5~0) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_nibble_map(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>(); + auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NIBBLE_MAP, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 18); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NIBBLE_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NIBBLE_MAP getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (B) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Nibble Map Decodes SPD Byte 60 - 77 (Bits 5~0) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_nibble_map(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>(); + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NIBBLE_MAP, l_mcs, l_value) ); + memcpy(o_array, &(l_value[mss::index(i_target)][0]), 36); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NIBBLE_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + +/// +/// @brief ATTR_EFF_NIBBLE_MAP getter +/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS> +/// @param[out] uint8_t* memory to store the value +/// @note Generated by gen_accessors.pl generateParameters (C) +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note Nibble Map Decodes SPD Byte 60 - 77 (Bits 5~0) creator: +/// mss_eff_cnfg +/// +inline fapi2::ReturnCode eff_nibble_map(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array) +{ + if (o_array == nullptr) + { + FAPI_ERR("nullptr passed to attribute accessor %s", __func__); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + } + + uint8_t l_value[2][2][18]; + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_EFF_NIBBLE_MAP, i_target, l_value) ); + memcpy(o_array, &l_value, 72); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed accessing ATTR_EFF_NIBBLE_MAP: 0x%lx (target: %s)", + uint64_t(fapi2::current_err), mss::c_str(i_target)); + return fapi2::current_err; +} + /// /// @brief ATTR_MSS_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT getter diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H index 454892813..ba099f268 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/shared/mss_const.H @@ -65,7 +65,7 @@ enum sizes MAX_NUM_IMP = 4, ///< number of impedances valid per slew type MAX_NUM_CAL_SLEW_RATES = 4, ///< 3V/ns, 4V/ns, 5V/ns, 6V/n MAX_DQ_BITS = 72, /// TODO RTC:157753 This is Nimbus specific. Should be attribute/trait of processor. - MAX_DQ_NIBBLES_X4 = MAX_DQ_BITS / BITS_PER_NIBBLE, ///< For x4's there are 18 DQ nibbles for DQ 72 bits + MAX_DQ_NIBBLES = MAX_DQ_BITS / BITS_PER_NIBBLE, ///< For ISDIMMs are 18 DQ nibbles for DQ 72 bits MAX_DRAMS_X8 = MAX_DQ_BITS / BITS_PER_NIBBLE, ///< For x8's there are 9 DRAM for 72 bits MAX_DRAMS_X4 = MAX_DQ_BITS / BITS_PER_BYTE, ///< For x4's there are 18 DRAM for 72 bits @@ -134,6 +134,10 @@ enum times /// enum ffdc_function_codes { + // Used in eff_dimm.C + NIBBLE_MAP_FUNC = 20, + PACKAGE_RANK_MAP_FUNC = 21, + // Used in fw_mark_store.H for MSS_INVALID_RANK_PASSED FWMS_READ = 30, FWMS_WRITE = 31, |